Electronic Components Datasheet Search
  English  ▼

X  

WM8804 Datasheet(PDF) 31 Page - Cirrus Logic

Part # WM8804
Description  1:1 Digital Interface Transceiver with PLL
PDF  66 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8804 Datasheet(HTML) 31 Page - Cirrus Logic

Back Button WM8804 Datasheet HTML 27Page - Cirrus Logic WM8804 Datasheet HTML 28Page - Cirrus Logic WM8804 Datasheet HTML 29Page - Cirrus Logic WM8804 Datasheet HTML 30Page - Cirrus Logic WM8804 Datasheet HTML 31Page - Cirrus Logic WM8804 Datasheet HTML 32Page - Cirrus Logic WM8804 Datasheet HTML 33Page - Cirrus Logic WM8804 Datasheet HTML 34Page - Cirrus Logic WM8804 Datasheet HTML 35Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 31 / 66 page
background image
Production Data
WM8804
w
PD, Rev 4.5, March 2009
31
S/PDIF TRANSMITTER
The S/PDIF transmitter generates the S/PDIF frames, and outputs on the TX0 pin. The transmitted
data can be sourced from one of two places, selectable using the TXSRC register. The transmitter
can be powered down using the SPDIFTXD register bit.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R6
PLL4
06H
5
TXVAL_SF0
0
Overwrite Mode S/PDIF Transmitter Validity Sub-
Frame 0
0 = transmit validity = 0
1 = transmit validity = 1
6
TXVAL_SF1
0
Overwrite Mode S/PDIF Transmitter Validity Sub-
Frame 1
0 = transmit validity = 0
1 = transmit validity = 1
7
TXVAL_
OVWR
0
S/PDIF Transmitter Validity Overwrite Mode Enable
0 = disabled, validity bit is 0 when the S/PDIF
transmitter sources PCM audio interface, or it matches
the S/PDIF input validity when the S/PDIF transmitter
sources the S/PDIF receiver.
1 = enabled, validity bit transmitted for subframe 0 is
defined by TXVAL_SF0, validity bit transmitted for
subframe 1 is defined by TXVAL_SF1.
R21
SPDTX4
15h
6
TXSRC
1
S/PDIF Transmitter Data Source
0 = S/PDIF received data.
1 = Audio interface received data
7
TXSTATSRC
0
S/PDIF Transmitter Channel Status Data Source
0 = Received channel status data
1 = Transmit channel status registers
Note 1: Only used if TXSRC=0
Note 2: See section User Data below
R30
PWRDN
1Eh
2
SPDIFTXPD
1
S/PDIF Transmitter Powerdown Enable
0 = S/PDIF transmitter enabled
1 = S/PDIF transmitter disabled
Table 33 S/PDIF Transmitter Control
The WM8804 also transmits the preamble and VUCP bits (Validity, User Data, Channel Status and
Parity bits).
VALIDITY BIT
By default, set to 0 (to indicate valid data) with the following exceptions:
1.
TXSRC=0 (S/PDIF receiver), where Validity is the value recovered from the S/PDIF input
stream by the S/PDIF receiver.
2.
TXVAL_OVWR=1, where Validity is the value set in registers TXVAL_SF0 and TXVAL_SF1.
USER DATA
Set to 0 as User Data configuration is not supported in the WM8804 – if TXSRC=0 and TXSTATSRC
=0 (S/PDIF receiver) User Data is set by the receiver.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com