Ver 1.0

Nov 09, 2000

TEL: 886-3-5788833

http://www.gmt.com.tw

10

G570

Global Mixed-mode Technology Inc.

Logic Input and Outputs

The serial interface consists of DATA, CLOCK, and

LATCH leads. The data is clocked in on the positive

leading edge of the clock (see Figure 2). The 9-bit (D0

through D8) serial data word is loaded during the positive

edge of the latch signal. The latch signal should occur

before the next positive leading edge of the block.

outputs in a high-impedance state and reduces chip qui-

escent current to 2µA to conserve battery power.

The G570 serial interface is designed to be compatible

with serial-interface PCMCIA controllers

and

current

PCMCIA and Japan Electronic Industry Development

Association (JEIDA) standards.

An overcurrent output ( OC ) is provided to indicate an

previously discussed.

NOTE:MOSFET switches S9 and S12 have a back-gate diode from the source to the drain.

Unused switch inputs should never be grounded.

Figure 3 Internal Switching Matrix

Thermal

cs

cs

cs

cs

Card A

V

PP1

V

PP2

V

CC

V

CC

Card B

V

CC

V

CC

V

PP2

V

PP1

S7

S8

S9

See Note A

S10

S11

S12

See Note A

Internal

Current Monitor

RESET

RESET

DATA

CLOCK

LATCH

} Serial

Interface

OC

GND

Supervisor

Controller

CPU

3.3V

3.3V

3.3V

5V

5V

5V

12V

12V

S1

S2

S3

S4

S5

S6

G570