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PCI1510 Datasheet(PDF) 39 Page - Texas Instruments

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Part # PCI1510
Description  PC CARD CONTROLLERS
PDF  128 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PCI1510 Datasheet(HTML) 39 Page - Texas Instruments

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3−1
3 Feature/Protocol Descriptions
The following sections give an overview of the PCI1510 controller. Figure 3−1 shows a simplified block diagram of
the controller. The PCI interface includes all address/data and control signals for PCI protocol. The interrupt interface
includes terminals for parallel PCI, parallel ISA, and serialized PCI and ISA signaling. Miscellaneous system interface
terminals include multifunction terminals: SUSPEND, RI_OUT/PME (power-management control signal), and
SPKROUT.
PCI Bus
PCI1510
Activity LED
PCI950
IRQSER
Deserializer
IRQSER
3
Interrupt
Controller
INTA
IRQ2−15
Multiplexer
23
PC Card
Socket
TPS2211A
Power
Switch
4
External ZV Port
VGA
Controller
Audio
Subsystem
Zoomed Video
19
4
Zoomed Video
NOTE: The PC Card interface is 68 terminals for CardBus and 16-bit PC Cards. In ZV mode, 23 terminals are used for routing the ZV signals
to the VGA controller and audio subsystem.
68
Figure 3−1. PCI1510 Simplified Block Diagram
3.1
Power Supply Sequencing
The controller contains 3.3-V I/O buffers with 5-V tolerance requiring an I/O power supply and an LDO-VR power
supply for core logic. The core power supply, which is always 2.5 V, can be supplied through the VR_PORT terminal
(when VR_EN is high) or from the integrated LDO-VR. The LDO-VR needs a 3.3-V power supply via the VCC
terminals. The clamping voltages (VCCCB and VCCP) can be either 3.3 V or 5 V, depending on the interface. The
following power-up and power-down sequences are recommended.
The power-up sequence is:
1.
Assert GRST to the device to disable the outputs during power up. Output drivers must be powered up in
the high-impedance state to prevent high current levels through the clamp diodes to the 5-V clamping rails
(VCCCB and VCCP).
2.
Apply 3.3-V power to VCC.
3.
Apply the clamp voltage.
The power-down sequence is:
1.
Assert GRST to the device to disable the outputs during power down. Output drivers must be powered down
in the high-impedance state to prevent high current levels through the clamp diodes to the 5-V clamping
rails (VCCCB and VCCP).



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