ML2722

DS2722-F-05

FINAL DATASHEET

DECEMBER 2003

4

ELECTRICAL CHARACTERISTICS

ABSOLUTE MAXIMUM RATINGS

Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute

maximum ratings are stress ratings only and functional device operation is not implied.

VDD, VCC5.................................................................................................................................................................6.0 V

VSS, GND..............................................................................................................................................................0 ± 0.3V

Junction Temperature ............................................................................................................................................... 150°C

Storage Temperature Range.......................................................................................................................-65°C to 150°C

Lead Temperature (Soldering, 10s) .......................................................................................................................... 260°C

OPERATING CONDITIONS

Normal Temperature Range..........................................................................................................................-10°C to 60°C

VCC5 Range................................................................................................................................................... 2.7V to 4.5V

Thermal Resistance (

VDD Range (VCC5 = VDD) ............................................................................................................................ 2.7V to 4.5V

12.288MHz reference frequency input

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

POWER CONSUMPTION

All Circuits, Standby Mode

10

100

µA

Receive or Transmit Mode

30

50

63.5

mA

Receive or Transmit Mode

20

50

70

mA

SYNTHESIZER

LO output frequency

In 512 KHz steps

902

928

MHz

Phase noise at driver output

1.2 MHz

3 MHz

>7 MHz

VCO phase locked, loop bandwidth

50KHz. Discontinuities, other than

reference spurs, not allowed.

-100

-120

-125

dBc/Hz

LO PLL reference frequency at

phase detector

PLL main divider input is at 1.83 GHz

1.024

MHz

N

LO division range integer

PLL divider limits

1024

4093

Count

LO charge pump sink/source

current

5.5

mA

LO lock up time for

Transmit/Receive frequency

change

From RXON asserted

50

µs

LO lock up time for channel

switch

From EN asserted, any channel

change in 902 to 928 MHz band

100

µs

LO lock up time from sleep

From XCEN, PLL dividers

programmed

240

µs

Reference signal input level

6.144 or 12.288MHz sine wave,

capacitively coupled

2.0

3.0

Vp-p