LAN91C100FD datasheet(25/68 Pages) SMSC

25 / 68 page

SMSC DS – LAN91C100FD REV. B

Rev. 05/31/2000

FULL STEP - This bit is a general purpose output port. Its inverse value drives pin nFSTEP and it is typically connected to

SEL pin of the LAN83C694. It can be used to select the signaling mode for the AUI or as a general purpose non-volatile

configuration pin. Defaults low.

AUI SELECT - This bit is a general purpose output port. Its value drives pin AUISEL and it is typically connected to MODE1

pin of the LAN83C694. It can be used to select AUI vs. 10BASE-T, or as a general purpose non-volatile configuration pin.

Defaults low.

Reserved - Must be 0.

INT SEL1-0 - Used to select one out of four interrupt pins. The three unused interrupts are tristated.

INT SEL1

INT SEL0

INTERRUPT PIN USED

INTR0

INTR1

INTR2

INTR3

BANK 1

OFFSET

NAME

TYPE

SYMBOL

BASE ADDRESS REGISTER

READ/WRITE

BAR

This register holds the I/O address decode option chosen for the LAN91C100FD. It is part of the EEPROM saved setup

and is not usually modified during run-time.

HIGH

BYTE

A15

A14

A13

LOW

BYTE

Reserved

A15 - A13 and A9 - A5 - These bits are compared against the I/O address on the bus to determine the IOBASE for the

LAN91C100FD‘s registers. The 64k I/O space is fully decoded by the LAN91C100FD down to a 16 location space,

therefore the unspecified address lines A4, A10, A11 and A12 must be all zeros.

All bits in this register are loaded from the serial EEPROM. The I/O base decode defaults to 300h (namely, the high byte

defaults to 18h).

Reserved - Must be 0.

LAN91C100FD Datasheet(PDF) 25 Page - SMSC Corporation