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LAN91C100FD Datasheet(PDF) 35 Page - SMSC Corporation

Part # LAN91C100FD
Description  FEAST FAST ETHERNET CONTROLLER WITH FULL DUPLEX CAPABILITY
PDF  68 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

LAN91C100FD Datasheet(HTML) 35 Page - SMSC Corporation

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SMSC DS – LAN91C100FD REV. B
Page 35
Rev. 05/31/2000
BANK 3
OFFSET
NAME
TYPE
SYMBOL
8
MANAGEMENT INTERFACE
READ/WRITE
MGMT
HIGH
BYTE
FLTST
MSK_
CRS100
0
0
1
1
0
0
1
1
LOW
BYTE
MDOE
MCLK
MDI
MDO
0
0
1
1
0
0
MDI Pin
0
FLTST - Facilitates the inclusion of packet forwarding information on the receive packet memory structure. When 0, RD0-
RD7 is always driven. When 1, RD0-RD7 is floated during RECEIVE FRAME STATUS WORD writes (RA2-RA16=0,
RCVDMA=1, nRWE0-nRWE3=0).
MSK_CRS100 - Disables CRS100 detection during transmit in half duplex mode (SWFDUP=0).
MDO - MII Management output. The value of this bit drives the MDO pin.
MDI - MII Management input. The value of the MDI pin is readable using this bit.
MDCLK - MII Management clock. The value of this bit drives the MDCLK pin.
MDOE - MII Management output enable. When high pin MDO is driven, when low pin MDO is tri-stated.
The purpose of this interface, along with the corresponding pins is to implement MII PHY management in software.
BANK 3
OFFSET
NAME
TYPE
SYMBOL
A
REVISION REGISTER
READ ONLY
REV
HIGH
BYTE
0
0
1
1
0
0
1
1
LOW
BYTE
CHIP
REV
1
0
0
0
0
0
0
0
CHIP - Chip ID. Can be used by software drivers to identify the device used.
REV - Revision ID. Incremented for each revision of a given device.
OFFSET
NAME
TYPE
SYMBOL
C
EARLY RCV REGISTER
READ/WRITE
ERCV
HIGH
BYTE
nRXDISC PIN COUNTER
0
0
0
0
0
0
0
0
LOW
BYTE
RCV
DISCRD
0
0
ERCV THRESHOLD
0
0
0
1
1
1
1
1



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