LTC3830ES datasheet(17/24 Pages) LINER

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LTC3830/LTC3830-1

sn3830 3830fs

APPLICATIO S I FOR ATIO

Figure 10b shows the Bode plot of the overall transfer

function.

When low ESR output capacitors (Sanyo OS-CON) are

used, the ESR zero can be high enough in frequency that

it provides little phase boost at the loop crossover fre-

quency. As a result, the phase margin becomes inad-

equate and the load transient is not optimized. To resolve

this problem, a small capacitor can be connected between

the top of the resistor divider network and the VFB pin to

create a pole-zero pair in the loop compensation. The zero

location is prior to the pole location and thus, phase lead

can be added to boost the phase margin at the loop

crossover frequency. The pole and zero locations are

located at:

fZC2 = 1/[2π(R2)(C2)] and

fPC2 = 1/[2π(R1||R2)(C2)]

where R1||R2 is the parallel combination resistance of R1

and R2. Choose C2 so that the zero is located at a lower

frequency compared to fCO and the pole location is high

enough that the closed loop has enough phase margin for

stability. Figure 10c shows the Bode plot using phase

lead compensation around the LTC3830 resistor divider

network. Note: This technique is effective only when

R1 >> R2 i.e., at high output voltages only so that the pole

and zero are sufficiently separated.

Although a mathematical approach to frequency compen-

sation can be used, the added complication of input and/or

output filters, unknown capacitor ESR, and gross operat-

ing point changes with input voltage, load current varia-

tions, all suggest a more practical empirical method. This

can be done by injecting a transient current at the load and

using an RC network box to iterate toward the final values,

or by obtaining the optimum loop response using a

network analyzer to find the actual loop poles and zeros.

Table 2 shows the suggested compensation component

value for 5V to 3.3V applications based on Sanyo OS-CON

4SP820M low ESR output capacitors.

Table 2. Recommended Compensation Network for 5V to 3.3V

Applications Using Multiple Paralleled 820

µF Sanyo OS-CON

4SP820M Output Capacitors

L1 (

µH)

COUT (µF)

RC (kΩ)CC (nF)

C1 (pF)

C2 (pF)

1.2

1640

6.2

3.3

470

1000

1.2

2460

3.3

470

1000

1.2

4100

1.8

220

1000

2.4

1640

2.7

330

1000

2.4

2460

1.0

220

1000

2.4

4100

1.0

220

1000

4.7

1640

1.8

330

1000

4.7

2460

1.0

180

1000

4.7

4100

1.0

180

1000

3830 F10b

3830 F10c

fLC

fZC2

fCO

fP fPC2

fESR

fCO

FREQUENCY

20dB/DECADE

fSW = LTC3830 SWITCHING

FREQUENCY

fCO = CLOSED-LOOP CROSSOVER

FREQUENCY

fSW = LTC3830 SWITCHING

FREQUENCY

fCO = CLOSED-LOOP CROSSOVER

FREQUENCY

Figure 10b. Bode Plot of the LTC3830 Overall Transfer Function

Figure 10c. Bode Plot of the LTC3830 Overall

Transfer Function Using a Low ESR Output Capacitor

LTC3830ES Datasheet(PDF) 17 Page - Linear Technology

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