T0501SA datasheet(3/7 Pages) CITC

3 / 7 page

Time (ns)

Typical Capacitance vs. Reverse Voltage

TLP Characteristic

Typical Insertion Loss (S21)

0.2

0.4

0.6

0.8

1.2

1.4

Reverse Voltage - V

R (V)

f = 1 MHz

35.0

30.0

25.0

20.0

15.0

10.0

5.0

0.01

0.1

Frequency (GHz)

Clamping Voltage vs. Peak Pulse Current

Peak Pulse Current - I

PP (A)

Waveform

Parameters:

tr = 8μs

td = 20μs

TLP Voltage (V)

Transmission Line Pulse Test

(TLP) Se ngs:

tp= 100ns, tr= 0.2ns,

ITLP andV TLP averaging window:

t1 = 70ns tot 2 = 90ns

ESD Clamping (+8kV Contact per IEC 61000-4-2)

ESD Clamping (-8kV Contact per IEC 61000-4-2)

-10

-20

-10

Time (ns)

Measured with 50 Ohm scope input

impedance, 2GHz bandwidth. Corrected

for 50 Ohm, 40dB a enuator. ESD gun

return path connected to ESD ground plane.

-40

-30

-20

-10

-20

-10

Time (ns)

Measured with 50 Ohm scope input

impedance, 2GHz bandwidth. Corrected

for 50 Ohm, 40dB a enuator. ESD gun

return path connected to ESD ground plane.

0.0

Document ID : DS-22V02

Revised Date : 2016/08/29

Revision : C

Ultra-Low Capacitance ESD Protection Device

T0501SA

Chip Integration Technology Corporation

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