AD9222

Data Sheet

Rev. F | Page 6 of 60

SWITCHING SPECIFICATIONS

AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −0.5 dBFS, unless otherwise noted.

Table 4.

AD9222-40

AD9222-50

AD9222-65

Parameter1

Temp

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

Unit

CLOCK2

Maximum Clock Rate

Full

40

50

65

MSPS

Minimum Clock Rate

Full

10

10

10

MSPS

Full

12.5

10.0

7.5

ns

Full

12.5

10.0

7.5

ns

OUTPUT PARAMETERS2, 3

Full

1.5

2.3

3.1

1.5

2.3

3.1

1.5

2.3

3.1

ns

Full

300

300

300

ps

Full

300

300

300

ps

Full

1.5

2.3

3.1

1.5

2.3

3.1

1.5

2.3

3.1

ns

Full

ns

Full

− 300

+ 300

− 300

+ 300

− 300

+ 300

ps

Full

− 300

+ 300

− 300

+ 300

− 300

+ 300

ps

Data to Data Skew

Full

±50

±200

±50

±200

±50

±200

ps

Wake-Up Time (Standby)

25°C

600

600

600

ns

Wake-Up Time (Power-Down)

25°C

375

375

375

μs

Pipeline Latency

Full

8

8

8

CLK

cycles

APERTURE

25°C

750

750

750

ps

Aperture Uncertainty (Jitter)

25°C

<1

<1

<1

ps

rms

Out-of-Range Recovery Time

25°C

1

1

1

CLK

cycles

1

See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed.

2

This can be adjusted via the SPI interface.

3

Measurements were made using a part soldered to FR4 material.

4