AD9600 datasheet(17/73 Pages) AD

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AD9600

Rev. B | Page 16 of 72

Pin No.

Mnemonic

Type

Description

ADC Fast Detect Outputs

FD0+

Output

Channel A/Channel B LVDS Fast Detect Indicator 0 True (see Table 14 for full details).

FD0−

Output

Channel A/Channel B LVDS Fast Detect Indicator 0 Complement (see Table 14

for details).

FD1+

Output

Channel A/Channel B LVDS Fast Detect Indicator 1 True (see Table 14 for details).

FD1−

Output

Channel A/Channel B LVDS Fast Detect Indicator 1 Complement (see Table 14

for details).

FD2+

Output

Channel A/Channel B LVDS Fast Detect Indicator 2 True (see Table 14 for details).

FD2−

Output

Channel A/Channel B LVDS Fast Detect Indicator 2 Complement (see Table 14

for details).

FD3+

Output

Channel A/Channel B LVDS Fast Detect Indicator 3 True (see Table 14 for details).

FD3−

Output

Channel A/Channel B LVDS Fast Detect Indicator 3 Complement (see Table 14

for details).

Digital Inputs

SYNC

Input

Digital Synchronization Pin (Slave Mode Only).

Digital Outputs

D0+

Output

Channel A/Channel B LVDS Output Data 0 True.

D0−

Output

Channel A/Channel B LVDS Output Data 0 Complement.

D1+

Output

Channel A/Channel B LVDS Output Data 1 True.

D1−

Output

Channel A/Channel B LVDS Output Data 1 Complement.

D2+

Output

Channel A/Channel B LVDS Output Data 2 True.

D2−

Output

Channel A/Channel B LVDS Output Data 2 Complement.

D3+

Output

Channel A/Channel B LVDS Output Data 3 True.

D3−

Output

Channel A/Channel B LVDS Output Data 3 Complement.

D4+

Output

Channel A/Channel B LVDS Output Data 4 True.

D4−

Output

Channel A/Channel B LVDS Output Data 4 Complement.

D5+

Output

Channel A/Channel B LVDS Output Data 5 True.

D5−

Output

Channel A/Channel B LVDS Output Data 5 Complement.

D6+

Output

Channel A/Channel B LVDS Output Data 6 True.

D6−

Output

Channel A/Channel B LVDS Output Data 6 Complement.

D7+

Output

Channel A/Channel B LVDS Output Data 7 True.

D7−

Output

Channel A/Channel B LVDS Output Data 7 Complement.

D8+

Output

Channel A/Channel B LVDS Output Data 8 True.

D8−

Output

Channel A/Channel B LVDS Output Data 8 Complement.

D9+

Output

Channel A/Channel B LVDS Output Data 9 True.

D9−

Output

Channel A/Channel B LVDS Output Data 9 Complement.

DCO+

Output

Channel A/Channel B LVDS Data Clock Output True.

DCO−

Output

Channel A/Channel B LVDS Data Clock Output Complement.

SPI Control

SCLK/DFS

Input

SPI Serial Clock/Data Format Select Pin in External Pin Mode.

SDIO/DCS

I/O

SPI Serial Data Input and Output/Duty Cycle Stabilizer in External Pin Mode.

CSB

Input

SPI Chip Select (Active Low).

Signal Monitor Port

SMI SDO/OEB

I/O

Signal Monitor Serial Data Output/Output Enable Input (Active Low) in

External Pin Mode.

SMI SDFS

Output

Signal Monitor Serial Data Frame Sync.

SMI SCLK/PDWN

I/O

Signal Monitor Serial Clock Output/Power-Down Input in External Pin Mode.

Do Not Connect

2 to 7, 62, 63

DNC

N/A

Do Not Connect.

AD9600 Datasheet(PDF) 17 Page - Analog Devices

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