PMWD18UN datasheet(5/12 Pages) PHILIPS

5 / 12 page

Philips Semiconductors

PMWD18UN

Dual N-channel

µTrenchMOS™ ultra low level FET

Product data

Rev. 02 — 23 February 2004

5 of 12

9397 750 12706

Characteristics

Table 5:

Characteristics

Tj =25 °C unless otherwise speciﬁed.

Symbol Parameter

Conditions

Min

Typ

Max

Unit

Static characteristics

V(BR)DSS drain-source breakdown voltage

ID = 250 µA; VGS =0V

Tj =25 °C

--V

Tj = −55 °C

--V

VGS(th)

gate-source threshold voltage

ID = 1 mA; VDS =VGS; Figure 9

0.45

0.7

IDSS

drain-source leakage current

VDS =30V; VGS =0V

Tj =25 °C

--1

µA

Tj = 150 °C

100

µA

IGSS

gate-source leakage current

VGS = ±10 V; VDS = 0 V

100

RDSon

drain-source on-state resistance

VGS = 4.5 V; ID =5A; Figure 7 and 8

Tj =25 °C

21.5

Ω

Tj = 150 °C

Ω

VGS = 1.8 V; ID = 4.5 A; Figure 7 and 8

2435m

Ω

VGS = 2.5 V; ID =5A; Figure 7 and 8

23.5

Ω

Dynamic characteristics

Qg(tot)

total gate charge

ID = 4 A; VDD =16V; VGS = 4.5 V; Figure 13

24.7

Qgs

gate-source charge

2.2

Qgd

gate-drain (Miller) charge

6.4

Ciss

input capacitance

VGS =0V; VDS = 16 V; f = 1 MHz; Figure 11

-1526 -pF

Coss

output capacitance

210

Crss

reverse transfer capacitance

160

td(on)

turn-on delay time

VDD =10V; ID = 1 A; VGS = 4.5 V; RG =6 Ω

-15

rise time

-21

td(off)

turn-off delay time

fall time

-26

Source-drain diode

VSD

source-drain (diode forward) voltage IS = 5 A; VGS =0V; Figure 12

0.87

1.2

trr

reverse recovery time

IS = 5 A; dIS/dt = −100 A/µs; VR =30V;

VGS =0V

-55

recovered charge

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