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PMWD18UN Datasheet(PDF) 9 Page - NXP Semiconductors |
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PMWD18UN Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 12 page ![]() Philips Semiconductors PMWD18UN Dual N-channel µTrenchMOS™ ultra low level FET Product data Rev. 02 — 23 February 2004 9 of 12 9397 750 12706 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 7. Package outline Fig 14. SOT530-1 (TSSOP8). UNIT A1 A max. A2 A3 bp L HE Lp wy v ce D(1) E(2) Z(1) θ REFERENCES OUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 0.05 0.95 0.85 0.30 0.19 0.20 0.13 3.1 2.9 4.5 4.3 0.65 6.5 6.3 0.70 0.35 8 ° 0 ° 0.1 0.1 0.1 0.94 DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.7 0.5 SOT530-1 MO-153 00-02-24 03-02-18 w M bp D Z e 0.25 14 8 5 θ A A2 A1 Lp (A3) detail X L HE E c v M A X A y 2.5 5 mm 0 scale TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4.4 mm SOT530-1 1.1 pin 1 index |
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