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COP684EG Datasheet(PDF) 22 Page - National Semiconductor (TI) |
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COP684EG Datasheet(HTML) 22 Page - National Semiconductor (TI) |
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22 / 48 page ![]() UART The device contains a full-duplex software programmable UART The UART (Figure 11) consists of a transmit shift register a receiver shift register and seven addressable reg- isters as follows a transmit buffer register (TBUF) a receiv- er buffer register (RBUF) a UART control and status regis- ter (ENU) a UART receive control and status register (ENUR) a UART interrupt and clock source register (ENUI) a prescaler select register (PSR) and baud (BAUD) register The ENU register contains flags for transmit and receive functions this register also determines the length of the data frame (7 8 or 9 bits) the value of the ninth bit in trans- mission and parity selection bits The ENUR register flags framming data overrun and parity errors while the UART is receiving Other functions of the ENUR register include saving the ninth bit received in the data frame enabling or disabling the UART’s attention mode of operation and providing addition- al receivertransmitter status information via RCVG and XMTG bits The determination of an internal or external clock source is done by the ENUI register as well as select- ing the number of stop bits and enabling or disabling trans- mit and receive interrupts A control flag in this register can also select the UART mode of operation asynchronous or synchronous TLDD11214 – 23 FIGURE 11 UART Block Diagram http www nationalcom 22 |
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