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COP684EG Datasheet(PDF) 39 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # COP684EG
Description  8-Bit Microcontroller with UART and Three Multi-Function Timers
PDF  48 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

COP684EG Datasheet(HTML) 39 Page - National Semiconductor (TI)

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Opcode Table (Continued)
Upper Nibble Along X-Axis
Lower Nibble Along Y-Axis
76
5
4
3
2
1
0
IFBIT
ANDSZ
LD B
0F
IFBNE 0
JSR
JMP
JP a17
INTR
0
0 B
A
i
x000 – x0FF
x000 – x0FF
IFBIT
LD B
0E
IFBNE 1
JSR
JMP
JP a18
JP a 21
1 B
x100 – x1FF
x100 – x1FF
IFBIT
LD B
0D
IFBNE 2
JSR
JMP
JP a19
JP a 32
2 B
x200 – x2FF
x200 – x2FF
IFBIT
LD B
0C
IFBNE 3
JSR
JMP
JP a20
JP a 43
3 B
x300 – x3FF
x300 – x3FF
IFBIT
CLRA
LD B
0B
IFBNE 4
JSR
JMP
JP a21
JP a 54
4 B
x400 – x4FF
x400 – x4FF
IFBIT
SWAPA
LD B
0A
IFBNE 5
JSR
JMP
JP a22
JP a 65
5 B
x500 – x5FF
x500 – x5FF
IFBIT
DCORA
LD B
09
IFBNE 6
JSR
JMP
JP a23
JP a 76
6 B
x600 – x6FF
x600 – x6FF
IFBIT
PUSHA
LD B
08
IFBNE 7
JSR
JMP
JP a24
JP a 87
7 B
x700 – x7FF
x700 – x7FF
SBIT
RBIT
LD B
07
IFBNE 8
JSR
JMP
JP a25
JP a 98
0 B
0 B
x800 – x8FF
x800 – x8FF
SBIT
RBIT
LD B
06
IFBNE 9
JSR
JMP
JP a26
JP a 10
9
1 B
1 B
x900 – x9FF
x900 – x9FF
SBIT
RBIT
LD B
05
IFBNE 0A
JSR
JMP
JP a27
JP a 11
A
2 B
2 B
xA00 – xAFF
xA00 – xAFF
SBIT
RBIT
LD B
04
IFBNE 0B
JSR
JMP
JP a28
JP a 12
B
3 B
3 B
xB00 – xBFF
xB00 – xBFF
SBIT
RBIT
LD B
03
IFBNE 0C
JSR
JMP
JP a29
JP a 13
C
4 B
4 B
xC00 – xCFF
xC00 – xCFF
SBIT
RBIT
LD B
02
IFBNE 0D
JSR
JMP
JP a30
JP a 14
D
5 B
5 B
xD00 – xDFF
xD00 – xDFF
SBIT
RBIT
LD B
01
IFBNE 0E
JSR
JMP
JP a31
JP a 15
E
6 B
6 B
xE00 – xEFF
xE00 – xEFF
SBIT
RBIT
LD B
00
IFBNE 0F
JSR
JMP
JP a32
JP a 16
F
7 B
7 B
xF00 – xFFF
xF00 – xFFF
Where
i is the immediate data
Md is a directly addressed memory location
is an unused opcode
Note
The opcode 60 Hex is also the opcode for IFBIT
iA
Mask Options
The mask programmable options are shown below The op-
tions are programmed at the same time as the ROM pattern
submission
OPTION 1
CLOCK CONFIGURATION
4 1
Crystal Oscillator (CKI10)
G7 (CKO) is clock generator
output to crystalresonator
CKI is the clock input
4 2
Single-pin RC controlled
oscillator (CKI10)
G7 is available as a HALT
restart andor general purpose
input
OPTION 2
HALT
4 1
Enable HALT mode
4 2
Disable HALT mode
OPTION 3
BONDING OPTIONS
4 1
44-Pin PLCC
4 2
40-Pin DIP
4 3
NA
4 4
28-Pin DIP
4 5
28-Pin SO
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