COP684EG datasheet(35/48 Pages) NSC

35 / 48 page

Addressing Modes

There are ten addressing modes six for operand address-

ing and four for transfer of control

OPERAND ADDRESSING MODES

This is the ‘‘normal’’ addressing mode The operand is the

data memory addressed by the B pointer or X pointer

decrement of pointer)

This addressing mode is used with the LD and X instruc-

tions The operand is the data memory addressed by the B

pointer or X pointer This is a register indirect mode that

automatically post increments or decrements the B or X reg-

ister after executing the instruction

Direct

The instruction contains an 8-bit address field that directly

points to the data memory for the operand

Immediate

The instruction contains an 8-bit immediate field as the op-

erand

Short Immediate

This addressing mode is used with the Load B Immediate

instruction The instruction contains a 4-bit immediate field

as the operand

Indirect

This addressing mode is used with the LAID instruction The

contents of the accumulator are used as a partial address

(lower 8 bits of PC) for accessing a data operand from the

program memory

TRANSFER OF CONTROL ADDRESSING MODES

Relative

This mode is used for the JP instruction with the instruction

field being added to the program counter to get the new

program location JP has a range from b31 to a32 to allow

a 1-byte relative jump (JP a 1 is implemented by a NOP

instruction) There are no ‘‘pages’’ when using JP since all

15 bits of PC are used

Absolute

This mode is used with the JMP and JSR instructions with

the instruction field of 12 bits replacing the lower 12 bits of

the program counter (PC) This allows jumping to any loca-

tion in the current 4k program memory segment

Absolute Long

This mode is used with the JMPL and JSRL instructions

with the instruction field of 15 bits replacing the entire 15

bits of the program counter (PC) This allows jumping to any

location up to 32k in the program memory space

Indirect

This mode is used with the JID instruction The contents of

the accumulator are used as a partial address (lower 8 bits

of PC) for accessing a location in the program memory The

contents of this program memory location serve as a partial

address (lower 8 bits of PC) for the jump to the next instruc-

tion

Note

The VIS is a special case of the Indirect Transfer of Control address-

ing mode where the double byte vector associated with the interrupt

is transferred from adjacent addresses in the program memory into

the program counter (PC) in order to jump to the associated interrupt

service routine

Instruction Set

Registers

8-Bit Accumulator Register

8-Bit Address Register

8-Bit Stack Pointer Register

15-Bit Program Counter Register

Upper 7 Bits of PC

Lower 8 Bits of PC

1 Bit of PSW Register for Carry

1 Bit of PSW Register for Half Carry

GIE

1 Bit of PSW Register for Global

Interrupt Enable

Interrupt Vector Upper Byte

Interrupt Vector Lower Byte

Symbols

Memory Indirectly Addressed by B

Memory Indirectly Addressed by X

Direct Addressed Memory

Mem

Direct Addressed Memory or B

Meml

Direct Addressed Memory or B or

Immediate Data

Imm

8-Bit Immediate Data

Reg

(Includes B X and SP)

Bit

Bit Number (0 to 7)

Loaded with

Exchanged with

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