AD9877-EB datasheet(18/37 Pages) AD

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AD9877

Rev. B | Page 17 of 36

Σ-Δ OUTPUTS

The AD9877 contains two independent Σ-Δ outputs that

provide a digital logic bit stream with an average duty cycle that

varies between 0% and (4095/4096)%, depending on the

programmed code, as shown in Figure 19.

These bit streams can be low-pass filtered to generate

programmable dc voltages of

VDC = (Σ-Δ Code/4096)(VH) + VL

where:

VH = VDRVDD − 0.6 V.

VL = 0.4 V.

In set-top box and cable modem applications, the outputs can

be used to control external variable gain amplifiers and RF

tuners. A simple single-pole RC low-pass filter provides

sufficient filtering (Figure 20).

In more demanding applications where additional gain, level

shift, or drive capability is required, a first or second order

active filter might be considered for each Σ-Δ output (Figure 21).

0x000

0x001

0x002

0x800

0xFFF

4096

× 8 t

MCLK

4096

× 8 t

MCLK

tMCLK

Figure 19. Σ-Δ Output Signals

Σ-Δ

CONTROL

WORD 0

CONTROL

WORD 1

SIGMA-DELTA 0

SIGMA-DELTA 1

DC (0.4 TO

DRVDD – 0.6V)

DC (0.4 TO

DRVDD – 0.6V)

TYPICAL:

R = 50k

C = 0.01

μF

f–3dB = 1/(2πRC) = 318Hz

÷8

MCLK

AD9877

Figure 20. Σ-Δ RC Filter

VOUT = (VSD + VOFFSET) (1 + R/R1)/2

TYPICAL:

R = 50k

C = 0.01

μF

f–3dB = 1/(2πRC) = 318Hz

AD9877

VOFFSET

OP250

VSD

VOUT

Σ-Δ

Figure 21. Σ-Δ Active Filter with Gain and Offset

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