UBA2014 datasheet(6/20 Pages) PHILIPS

6 / 20 page

2002 May 16

Philips Semiconductors

Product speciﬁcation

600 V driver IC for HF ﬂuorescent lamps

UBA2014

FUNCTIONAL DESCRIPTION

Start-up state

Initial start-up can be achieved by charging the low voltage

supply capacitor C7 (see Fig.8) via an external start-up

resistor. Start-up of the circuit is achieved under the

condition that both half-bridge transistors TR1 and TR2

are non-conductive. The circuit will be reset in the start-up

state. If the low voltage supply (VDD) reaches the value of

VDD(H) the circuit will start oscillating. A DC reset circuit is

incorporated in the High-Side (HS) driver. Below the

lock-out voltage at the FVDD pin the output voltage

(VGH − VSH) is zero. The voltages at pins CF and CT are

zero during the start-up state.

Oscillation

The internal oscillator is a Voltage-Controlled Oscillator

circuit (VCO) which generates a sawtooth waveform

between the CFhigh level and 0 V. The frequency of the

sawtooth is determined by capacitor CCF, resistor RIREF,

and the voltage at pin CSW. The minimum and maximum

switching frequencies are determined by RIREF and CCF;

their ratio is internally fixed. The sawtooth frequency is

twice the half-bridge frequency. The UBA2014 brings the

transistors TR1 and TR2 into conduction alternately with a

duty cycle of approximately 50%. An overview of the

oscillator signal and driver signals is illustrated in Fig.4.

The oscillator starts oscillating at fmax. During the first

switching cycle the Low-Side (LS) transistor is switched

on. The first conducting time is made extra long to enable

the bootstrap capacitor to charge.

Adaptive non-overlap

The non-overlap time is realized with an adaptive

non-overlap circuit (ANT). By using an adaptive

non-overlap circuit, the application can determine the

duration of the non-overlap time and make it optimum for

each frequency (see Fig.4). The non-overlap time is

determined by the slope of the half-bridge voltage, and is

detected by the signal across resistor R16 which is

connected directly to pin ACM. The minimum non-overlap

time is internally fixed. The maximum non-overlap time is

internally fixed at approximately 25% of the bridge period

time. An internal filter of 30 ns is included at the ACM pin

to increase the noise immunity.

Timing circuit

A timing circuit is included to determine the preheat time

and the ignition time. The circuit consists of a clock

generator and a counter.

The preheat time is defined by CCT and RIREF and consists

of 7 pulses at CCT; the maximum ignition time is 1 pulse at

CCT. The timing circuit starts operating after the start-up

state, as soon as the low supply voltage (VDD) has reached

VDD(H) or when a critical value of the lamp voltage

(Vlamp(fail)) is exceeded. When the timer is not operating

CCT is discharged to 0 V at 1 mA.

Preheat state

After starting at fmax, the frequency decreases until the

momentary value of the voltage across sense resistor R14

reaches the internally fixed preheat voltage level (pin

PCS). At crossing the preheat voltage level, the output

current of the Preheat Current Sensor circuit (PCS)

discharges the capacitor CCSW, thus raising the frequency.

The preheat time begins at the moment that the circuit

starts oscillating. During the preheat time the Average

Current Sensor circuit (ACS) is disabled. An internal filter

of 30 ns is included at pin PCS to increase the noise

immunity.

Ignition state

After the preheat time the ignition state is entered and the

frequency will sweep down due to charging of the

capacitor at pin CSW with an internally fixed current; see

Fig.5. During this continuous decrease in frequency, the

circuit approaches the resonant frequency of the load. This

will cause a high voltage across the load, which normally

ignites the lamp. The ignition voltage of a lamp is designed

above the Vlamp(fail) level. If the lamp voltage exceeds the

Vlamp(fail) level the ignition timer is started.

Burn state

If the lamp voltage does not exceed the Vlamp(max) level the

voltage at pin CSW will continue to increase until the clamp

level at pin CSW is reached; see Fig.5. As a consequence

the frequency will decrease until the minimum frequency is

reached.

When the frequency reaches its minimum level it is

assumed that the lamp has ignited and the circuit enters

the burn state. The Average Current Sensor circuit (ACS)

will be enabled. As soon as the averaged voltage across

sense resistor R14, measured at pin CS

−, reaches the

reference level at pin CS+, the average current sensor

circuit will take over the control of the lamp current. The

average current through R14 is transferred to a voltage at

the voltage controlled oscillator and regulates the

frequency and, as a result, the lamp current.

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