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UBA2014 Datasheet(PDF) 7 Page - NXP Semiconductors |
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UBA2014 Datasheet(HTML) 7 Page - NXP Semiconductors |
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7 / 20 page ![]() 2002 May 16 7 Philips Semiconductors Product specification 600 V driver IC for HF fluorescent lamps UBA2014 Lamp failure mode DURING IGNITION STATE If the lamp does not ignite, the voltage level increases. When the lamp voltage exceeds the Vlamp(max) level, the voltage will be regulated at the Vlamp(max) level; see Fig.6. At crossing the Vlamp(fail) level the ignition timer was already started. If the voltage at pin LVS is above the Vlamp(fail) level at the end of the ignition time the circuit stops oscillating and is forced in a Power-down mode. The circuit will be reset only when the supply voltage is powered-down. DURING BURN STATE If the lamp fails during normal operation, the voltage across the lamp will increase and the lamp voltage will exceed the Vlamp(fail) level; see Fig.7. At that moment the ignition timer is started. If the lamp voltage increases further it will reach the Vlamp(max) level. This forces the circuit to re-enter the ignition state and results in an attempt to re-ignite the lamp. If during restart the lamp still fails, the voltage remains high until the end of the ignition time. At the end of the ignition time the circuit stops oscillating and the circuit will enter in the Power-down mode. Power-down state The Power-down state will be entered if, at the end of the ignition time, the voltage at pin LVS is above Vlamp(fail). In the Power-down mode the oscillator will be stopped and both TR1 and TR2 will be non-conductive. The VDD supply is internally clamped. The circuit is released from the Power-down state by lowering the low voltage supply below VDD(reset). Capacitive mode protection The signal across R16 also gives information about the switching behaviour of the half bridge. If, after the preheat state, the voltage across the ACM resistor (R16) does not exceed the VCMD level during the non-overlap time, the Capacitive Mode Detection circuit (CMD) assumes that the circuit is in the capacitive mode of operation. As a consequence the frequency will directly be increased to fmax. The frequency behaviour is decoupled from the voltage at pin CSW until CCSW has been discharged to zero. Charge coupling Due to parasitic capacitive coupling to the high voltage circuitry all pins are burdened with a repetitive charge injection. Given the typical application the pins IREF and CF are sensitive to this charge injection. For charge coupling of ±8 pC, a safe functional operation of the IC is guaranteed, independent of the current level. Charge coupling at current levels below 50 µA will not interfere with the accuracy of the VCS, VPCS and VACM levels. Charge coupling at current levels below 20 µA will not interfere with the accuracy of any parameter. Design equations The following design equations are used to calculate the desired preheat time, the maximum ignition time, and the minimum and the maximum switching frequency. tph = 1.7 × 10−4 × CCT × RIREF (s) tign = 3.1 × 10−5 × CCT × RIREF (s) in kHz fmax = 2.5 × fmin (kHz) with CCT in nF, RIREF in kΩ, and CCF in pF. Start of ignition is defined as the moment at which the measured lamp voltage crosses the Vlamp(fail) level; see Section “Lamp failure mode”. f min 125 10 3 × C CF R IREF × () ------------------------------------- = |
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