MT9V024 datasheet(29/40 Pages) ONSEMI

29 / 40 page

MT9V024/D

www.onsemi.com

Table 12. RESERVED WORDS IN THE PIXEL DATA STREAM

Pixel Data Reserved Word

Flag

Precedes frame valid assertion

Precedes line valid assertion

Succeeds line valid de−assertion

Succeeds frame valid de−assertion

When LVDS mode is enabled along with column binning

(bin 2 or bin 4, R0x0D[3:2]), the packet size remains the

same but the serial pixel data stream repeats itself depending

on whether 2X or 4X binning is set:

• For bin 2, LVDS outputs double the expected data

(pixel 0,0 is output twice in sequence, followed by pixel

0, 1 twice,

…).

• For bin 4, LVDS outputs 4 times the expected data

(pixel 0,0 is output 4 times in sequence followed by

pixel 0, 1 times 4,

…).

The receiving hardware will need to undersample the

output stream,getting data either every 2 clocks (bin 2) or

every 4 (bin 4) clocks.

If the sensor provides a pixel whose value is 0, 1, 2, or 3

(that is, the same as a reserved word) then the outgoing serial

pixel value is switched to 4.

LVDS Enable and Disable

The Table 10 and Table 11 further explain the state of the

LVDS output pins depending on LVDS control settings.

When the LVDS block is not used, it may be left powered

down to reduce power consumption.

Table 13. SER_DATAOUT_*STATE

R0xB1[1]

LVDS power down

R0xB3[4]

LVDS data power down

SER_DATAOUT_*

Active

Table 14. SER_DATAOUT_*STATE

R0xB1[1]

LVDS power down

R0xB2[4]

LVDS shift−clk power down

SHFT_CLKOUT_*

Active

6. ERROR pin: When the sensor is not in stereo mode, the ERROR pin is at LOW.

MT9V024 Datasheet(PDF) 29 Page - ON Semiconductor

MT9V024 Datasheet(HTML) 29 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

Datasheet Download

Link URL