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EVAL-AD7760EB Datasheet(PDF) 20 Page - Analog Devices |
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EVAL-AD7760EB Datasheet(HTML) 20 Page - Analog Devices |
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20 / 37 page ![]() AD7760 Rev. A | Page 19 of 36 MODULATOR DATA OUTPUT MODE Operating the AD7760 in modulator output mode enables the output of data directly from the Σ-Δ modulator. This mode of operation bypasses the AD7760 on-board digital filtering capabilities, outputting data in its unfiltered form. As discussed in the Theory of Operation section, the AD7760 operates using oversampling, which spreads quantization noise over a wide bandwidth. The decrease in the quantization noise energy in the resulting signal band is illustrated in Figure 40a. By coupling the use of oversampling with the use of a high order, multibit Σ-Δ modulator, the AD7760 further reduces the quantization noise in the signal band. Figure 41 is an FFT of unfiltered data output from the AD7760 when it is used in modulator output mode. This clearly demonstrates the shaping of the quantization noise performed by the AD7760’s Σ-Δ modulator. MODULATOR INPUTS The maximum voltage input to each differential modulator input pin is 0.8 × 4.096 V ≈ 3.275 V (80% of VREF), which must sit on a common mode of VREF/2. This maximum differential input voltage is shown as the conditioned output of the AD7760’s on-board differential amplifier in Figure 52 in the Driving the AD7760 section. Further details on the signal conditioning implemented by the AD7760’s on-board differential amplifier and the recommended external circuitry that accompanies it is described in the Driving the AD7760 section. 0 –160 0 1 FREQUENCY (MHz) 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 1 2 3 4 5 6 7 8 9 Figure 41. FFT of Data Output by the AD7760 in Modulator Output Mode MODULATOR DATA OUTPUT SCALING In modulator output mode, data is output in a 16-bit twos complement format on Pins D [15:0]; however, this data is scaled to 15 bits. The transfer function in Figure 42 shows the scaling involved for the 16 data bits output from Modulator Pins D[15:0] vs. the maximum differential voltage input allowed for the modulator inputs (VIN+ and VIN−). D[15:0] 0011 0011 0011 0010 0011 1111 1111 1111 0000 0000 0000 0000 1100 1100 1100 1100 1100 0000 0000 0000 +4.096V –4.096V VIN+ = 3.6855V VIN– = 0.4105V +3.275V = MODULATOR FULL SCALE = 80% OF +4.096V 80% OF +4.096V = MODULATOR FULL SCALE = –3.275V VIN+ = 2.048V VIN– = 2.048V VIN+ = 0.4105V VIN– = 3.6855V Figure 42. Modulator Output Data Scaling As the nature of the modulator output is coarse relative to the fully filtered output of the AD7760 (due to the associated quantization noise of the modulator output), Bits D[3:0] of the modulator output are zero when operating in modulator data output mode. Thus, the data outputs for the calculations listed in Example 1 and Example 2 for inputs to the modulator pins VIN+ and VIN− show Bits D[3:0] of the modulator output as zero. Example 1 VIN+ = 3.5 V VIN− = 0.595 V Modulator Output Code = ([VIN(+) − VIN(−)]/4.096 V) × 16384 = [(3.5 V − 0.595 V)/4.096 V] × 16384 = +11620 Direct Scaling: [0010 1101 0110 0100] Value Output on Data Output Pins D[15:0]: D [15:0] = [0010 1101 0110 0000]. Example 2 VIN+ = 0.595 V VIN− = 3.5 V Modulator Output Code = ([VIN(+) − VIN(−)]/4.096 V) × 16384 = [(0.595 V − 3.5 V)/4.096 V] × 16384 = −11620 Direct Scaling: [1101 0010 1001 1100] Value Output on Data Output Pins D[15:0]: D [15:0] = [1101 0010 1001 0000]. |
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