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HT86384 Datasheet(PDF) 30 Page - Holtek Semiconductor Inc |
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HT86384 Datasheet(HTML) 30 Page - Holtek Semiconductor Inc |
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30 / 39 page  HT86XXX Rev. 1.70 30 May 6, 2004 Audio Output and Volume Control - DAL, DAH, VOL The HT86XXX provides one 12-bit current type DAC de- vice for driving external 8 W speaker through an external NPN transistor. The programmer must write the voice data to register DAL (27H) and DAH (28H). The 12-bit audio output will be written to the higher nibble of DAL and the whole byte of DAH, and the DAL3~0 is always read as 0H. There are 8 scales of volume controllable level that are provided for the current type DAC output. The programmer can change the volume by only writing the volume control data to the higher-nibble of the VOL (29H), and the lower-nibble of VOL (29H) is always read as 0H. Voice Control Register - VOICEC (26H) The voice control register controls the voice ROM circuit and DAC circuit, selects voice ROM latch counter, and controls 32kHz crystal to start in speed-up mode or not. If the DAC circuit is not enabled, any DAH/DAL output is invalid. Writing a ²1² to DAC bit is to enable DAC circuit, and writing a ²0² to DAC bit is to disable DAC circuit. If the voice ROM circuit is not enabled, then voice ROM data cannot be accessed at all. Writing a ²1² to VROMC bit is to enable the voice ROM circuit, and writing a ²0² to VROMC bit is to disable the voice ROM circuit. The bit 4 (LATCHC) is to determine what voice ROM address latch counter will be adopted as voice ROM address latch counter. The bit 7 (FAST) is to determine how to activate 32kHz crystal of TMR3 ¢s clock source. Label Bits Function ¾ 0 Unused bit, read as ²0² DAC 1 Enable/disable DAC circuit (0= disable DAC circuit; 1= enable DAC circuit) The DAC circuit is not affected by the HALT instruction. The software controls bit DAC (VoiceC.1) whether to enable/disable. VROMC 2 Enable/disable voice ROM circuit (0= disable voice ROM circuit; 1= enable voice ROM circuit) ¾ 3 Unused bit, read as ²0² LATCHC 4 Select voice ROM counter (0= voice ROM address latch 0; 1= voice ROM address latch 1) ¾ 5, 6 Unused bit, read as ²0² FAST 7 Enable/disable speed-up 32kHz crys- tal. Default to 0. (0= speed-up 32kHz crystal; 1= non-speed-up 32kHz crystal) Voice ROM Data Address Latch Counter LATCH0H(18H)/LATCH0M(19H)/LATCH0L(1AH), LATCH1H(1BH)/LATCH1M(1CH)/LATCH1L(1DH) and voice ROM data register(2AH) The voice ROM data address latch counter is the hand- shaking between the microcontroller and voice ROM, where the voice codes are stored. One 8-bit of voice ROM data will be addressed by setting 24-bit address latch counter LATCH0H/LATCH0M/LATCH0L or LATCH1H/LATCH1M/LATCH1L. After the 8-bit voice ROM data is addressed, a few instruction cycles (4 msat least) will be cost to latch the voice ROM data, then the microcontroller can read the voice data from LATCHD(2AH). Example: Read an 8-bit voice ROM data which is lo- cated at address 000007H by address latch 0 set [26H].2 ; Enable voice ROM circuit clr [26H].4 ; Select voice ROM address ; latch counter 0 mov A, 07H ; mov LATCH0L, A ; Set LATCH0L to 07H mov A, 00H ; mov LATCH0M, A ; Set LATCH0M to 00H mov A, 00H ; mov LATCH0H, A ; Set LATCH0H to 00H call Delay Time ; Delay a short period of time mov A, LATCHD ; Get voice data at 000007H |
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