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TS68040 Datasheet(PDF) 32 Page - ATMEL Corporation

Part # TS68040
Description  Third- Generation 32-bit Microprocessor
PDF  49 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

TS68040 Datasheet(HTML) 32 Page - ATMEL Corporation

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TS68040
2116A–HIREL–09/02
Data Types and
Addressing Modes
The TS68040 supports the basic data types shown in Table 18. Some data types apply
only to the integer unit, some only to the FPU, and some to both the integer unit and the
FPU. In addition, the instruction set supports operations on other data types such as
memory addresses.
Note:
1. IU = Integer Unit.
The three integer data formats that are common to both the integer unit and the FPU
(byte, word, and long word) are the standard twos-complement data formats defined in
the TS68000 Family architecture. Whenever an integer is used in a floating-point opera-
tion, the integer is automatically converted by the FPU to an extended-precision floating-
point number before being used. The ability to effectively use integers in floating-point
operations saves user memory because an integer representation of a number usually
requires fewer bits than the equivalent floating-point representation.
Single- and double-precision floating-point data formats are implemented in the FPU as
defined by the IEEE standard. These data formats are the main floating-point formats
and should be used for most calculations involving real numbers.
The extended-precision data format is also in conformance with the IEEE standard, but
the standard does not specify this format to the bit level as it does for single- and dou-
ble-precision. The memory format for the FPU consists of 96 bits (three long words).
Only 80 bits are actually used; the other 16 bits are reserved for future use and for long-
word alignment of the floating-point data structures in memory. The extended-precision
format has a 15-bit exponent, a 64-bit mantissa, and a 1-bit mantissa sign. Extended-
precision numbers are intended for use as temporary variables, intermediate values, or
where extra precision is needed.
The TS68040 addressing modes are shown in Table 19. The register indirect address-
ing modes support post-increment, predecrement, offset, and indexing, which are
particularly useful for handling data structures common to sophisticated applications
and high-level languages. The program counter indirect mode also has indexing and off-
set capabilities; this addressing mode is typically required to support position-
independent software. In addition to these addressing modes, the TS68040 provides
index sizing and scaling features that enhance software performance. Data formats are
supported orthogonally by all arithmetic operations and by all appropriate addressing
modes.
Table 18. Data Types
Operand Data Type
Size
Execution Unit (IU
(1), FPU)
Notes
Bit
1-bit
IU
Bit Field
1-32 bits
IU
Field of consecutive bits
BCD
32 bits
IU
Packaged: 2 digits byte
Unpacked: 1 digit byte
Byte Integer
8 bits
IU, FPU
Word Integer
16 bits
IU, FPU
Long-word Integer
32 bits
IU, FPU
Quad-word Integer
64 bits
IU
Any two data registers
16-byte
128 bits
IU
Memory-only, aligned 16-byte boundary
Single-precision Real
32 bits
FPU
1-bit sign, 8-bit exponent, 23-bit mantissa
Double-precision Real
64 bits
FPU
1-bit sign, 11-bit exponent, 52-bit mantissa
Extended-precision Real
80 bits
FPU
1-bit sign, 15-bit exponent, 64-bit mantissa



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