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SLG46121V Datasheet(PDF) 32 Page - Dialog Semiconductor

Part # SLG46121V
Description  Personal Computers and Servers
PDF  98 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

SLG46121V Datasheet(HTML) 32 Page - Dialog Semiconductor

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000-0046121--106
Page 31 of 97
SLG46121
8.1 Matrix Input Table
Table 15. Matrix Input Table
N
Matrix Input Signal Function
Matrix Decode
5
4
3
2
1
0
0
VSS
00
000
0
1
pin2 digital Input
0
0
0
0
0
1
2
pin3 digital Input
0
0
0
0
1
0
3
pin4 digital Input
0
0
0
0
1
1
4
pin5 digital Input
0
0
0
1
0
0
5
pin6 digital Input
0
0
0
1
0
1
6
LUT2_0 output (DFF/LATCH_0 output)
0
0
0
1
1
0
7
LUT2_1 output (DFF/LATCH_1 output)
0
0
0
1
1
1
8
LUT2_2 output (DFF/LATCH_2 output)
0
0
1
0
0
0
9
LUT2_3 output (DFF/LATCH_3 output)
0
0
1
0
0
1
10
LUT2_4 output
0
0
1
0
1
0
11
sig_1pipe_dly_out (1st stage pipe delay output)
0
0
1
0
1
1
12
LUT3_0 output (DFF/LATCH_4 output with resetb or seb)
0
0
1
1
0
0
13
LUT3_1 output (DFF/LATCH_5 output with resetb or seb)
0
0
1
1
0
1
14
LUT3_2 output (DFF/LATCH_6 output with resetb or seb)
0
0
1
1
1
0
15
LUT3_3 output (DFF/LATCH_7 output with resetb or seb)
0
0
1
1
1
1
16
LUT3_4 output
0
1
0
0
0
0
17
LUT3_5 output
0
1
0
0
0
1
18
LUT3_6 output
0
1
0
0
1
0
19
LUT3_7 output
0
1
0
0
1
1
20
LUT3_8 output (pipe delay output0)
0
1
0
1
0
0
21
LUT4_0 output (CNT_DLY3 output (8 bit w/ ext CK,reset))
0
1
0
1
0
1
22
LUT4_1 output (CNT_DLY4 output (8 bit w/ ext CK,reset))
0
1
0
1
1
0
23
CNT_DLY0(14bit) output
0
1
0
1
1
1
24
CNT_DLY1 output (8 bit w/ ext CK,reset)
0
1
1
0
0
0
25
Edge detector output from CNT_DLY4
0
1
1
0
0
1
26
ACMP_0 output
0
1
1
0
1
0
27
ACMP_1 output
0
1
1
0
1
1
28
pipe delay output1
0
1
1
1
0
0
29
Programmable delay with edge detector output (Deglitch filter out-
put)
01
110
1
30
internal oscillator output (one of /1, /2, /3, /4, /8, /12, /24, /64 se-
lected by REG)
01
111
0
31
internal oscillator output (one of /1, /2, /3, /4, /8, /12, /24, /64 se-
lected by REG)
01
111
1
32
Bandgap OK signal
1
0
0
0
0
0
33
Resetb_core as matrix input
1
0
0
0
0
1
34
pin8 digital Input
1
0
0
0
1
0
35
pin9 digital Input
1
0
0
0
1
1



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