TMS320F28062 datasheet(29/179 Pages) TI1

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tw(RSL1)

th(boot-mode)(C)

(3.3 V)

DDIO

DDA

INTOSC1

X1/X2

XRS

(D)

Boot-Mode

Pins

(1.8 V)

XCLKOUT

User-code dependent

Boot-ROM execution starts

Peripheral/GPIO function

Based on boot code

GPIO pins as input

OSCST

Address/Data/

Control

(Internal)

Address/data valid, internal boot-ROM code execution phase

User-code execution phase

td(EX)

INTOSCST

(A)

(B)

I/O Pins

GPIO pins as input [state depends on internal pullup/pulldown (PU/PD)]

User-code dependent

(E)

TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066

TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062

www.ti.com

SPRS698F – NOVEMBER 2010 – REVISED MARCH 2016

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Product Folder Links: TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065

TMS320F28064 TMS320F28063 TMS320F28062

Specifications

5.12 Power Sequencing

There is no power sequencing requirement needed to ensure the device is in the proper state after reset

or to prevent the I/Os from glitching during power up or power down (GPIO19, GPIO26–27, GPIO34–38

do not have glitch-free I/Os). No voltage larger than a diode drop (0.7 V) above VDDIO should be applied to

any digital pin before powering up the device. Voltages applied to pins on an unpowered device can bias

internal p-n junctions in unintended ways and produce unpredictable results.

Upon power up, SYSCLKOUT is OSCCLK/4. Since the XCLKOUTDIV bits in the XCLK register come up with a reset

state of 0, SYSCLKOUT is further divided by 4 before it appears at XCLKOUT. XCLKOUT = OSCCLK/16 during this

phase.

Boot ROM configures the DIVSEL bits for /1 operation. XCLKOUT = OSCCLK/4 during this phase. Note that

XCLKOUT will not be visible at the pin until explicitly configured by user code.

After reset, the boot ROM code samples Boot Mode pins. Based on the status of the Boot Mode pin, the boot code

branches to destination memory or boot code function. If boot ROM code executes after power-on conditions (in

debugger environment), the boot code execution time is based on the current SYSCLKOUT speed. The SYSCLKOUT

will be based on user environment and could be with or without PLL enabled.

Using the XRS pin is optional due to the on-chip POR circuitry.

The internal pullup or pulldown will take effect when BOR is driven high.

Figure 5-5. Power-on Reset

TMS320F28062 Datasheet(PDF) 29 Page - Texas Instruments

TMS320F28062 Datasheet(HTML) 29 Page - Texas Instruments

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