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TMS320F28062 Datasheet(PDF) 30 Page - Texas Instruments

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Part # TMS320F28062
Description  Piccolo Microcontrollers
PDF  179 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320F28062 Datasheet(HTML) 30 Page - Texas Instruments

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th(boot-mode)(A)
tw(RSL2)
INTOSC1
X1/X2
XRS
Boot-Mode
Pins
XCLKOUT
I/O Pins
Address/Data/
Control
(Internal)
Boot-ROM Execution Starts
User-Code Execution Starts
User-Code Dependent
User-Code Execution Phase
User-Code Dependent
User-Code Execution
Peripheral/GPIO Function
User-Code Dependent
GPIO Pins as Input (State Depends on Internal PU/PD)
GPIO Pins as Input
Peripheral/GPIO Function
td(EX)
30
TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
SPRS698F – NOVEMBER 2010 – REVISED MARCH 2016
www.ti.com
Submit Documentation Feedback
Product Folder Links: TMS320F28069 TMS320F28068 TMS320F28067 TMS320F28066 TMS320F28065
TMS320F28064 TMS320F28063 TMS320F28062
Specifications
Copyright © 2010–2016, Texas Instruments Incorporated
Table 5-3. Reset (XRS) Timing Requirements
MIN
MAX
UNIT
th(boot-mode)
Hold time for boot-mode pins
1000tc(SCO)
cycles
tw(RSL2)
Pulse duration, XRS low on warm reset
32tc(OSCCLK)
cycles
(1)
Dependent on crystal/resonator and board design.
Table 5-4. Reset (XRS) Switching Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
tw(RSL1)
Pulse duration, XRS driven by device
600
μs
tw(WDRS)
Pulse duration, reset pulse generated by watchdog
512tc(OSCCLK)
cycles
td(EX)
Delay time, address/data valid after XRS high
32tc(OSCCLK)
cycles
tINTOSCST
Start up time, internal zero-pin oscillator
3
μs
tOSCST
(1)
On-chip crystal-oscillator start-up time
1
10
ms
A.
After reset, the Boot ROM code samples BOOT Mode pins. Based on the status of the Boot Mode pin, the boot code
branches to destination memory or boot code function. If Boot ROM code executes after power-on conditions (in
debugger environment), the Boot code execution time is based on the current SYSCLKOUT speed. The
SYSCLKOUT will be based on user environment and could be with or without PLL enabled.
Figure 5-6. Warm Reset



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