AD9675KBCZ datasheet(8/61 Pages) AD

8 / 61 page

Data Sheet

AD9675

Rev. A | Page 7 of 60

DIGITAL SPECIFICATIONS

AVDD1 = 1.8 V, AVDD2 = 3.0 V, DVDD = 1.4 V, DRVDD = 1.8 V, 1.0 V internal ADC reference, full temperature range (0°C to 85°C),

unless otherwise noted.

Table 2.

Parameter1

Temperature

Min

Typ

Max

Unit

INPUTS (CLK+, CLK−, TX_TRIG+, TX_TRIG−)

Logic Compliance

CMOS/LVDS/LVPECL

Differential Input Voltage2

0.2

3.6

V p-p

Input Voltage Range

GND – 0.2

AVDD1 + 0.2

Input Common-Mode Voltage

0.9

Input Resistance (Differential)

25°C

kΩ

Input Capacitance

25°C

INPUTS (MLO+, MLO−, RESET+, RESET−)

Logic Compliance

LVDS/LVPECL

Differential Input Voltage2

0.250

AVDD2 × 2

V p-p

Input Voltage Range

GND – 0.2

AVDD2 + 0.2

Input Common-Mode Voltage

AVDD2/2

Input Resistance (Single-Ended)

25°C

kΩ

Input Capacitance

25°C

1.5

LOGIC INPUTS (PDWN, STBY, SCLK, SDIO, ADDRx)

Logic 1 Voltage

Full

1.2

DRVDD + 0.3

Logic 0 Voltage

Full

0.3

Input Resistance

25°C

30 (26 for SDIO)

kΩ

Input Capacitance

25°C

2 (5 for SDIO)

LOGIC INPUT (CSB)

Logic 1 Voltage

Full

1.2

DRVDD + 0.3

Logic 0 Voltage

Full

0.3

Input Resistance

25°C

kΩ

Input Capacitance

25°C

LOGIC OUTPUT (SDIO)3

Logic 1 Voltage (IOH = 800 μA)

Full

1.79

Logic 0 Voltage (IOL = 50 μA)

Full

0.05

DIGITAL OUTPUTS (SERDOUTx+, SERDOUTx−)

Logic Compliance

CML

Differential Output Voltage (VOD)

Full

400

600

750

Output Offset Voltage (VOS)

Full

0.75

1.05

LOGIC OUTPUT (GPO0, GPO1, GPO2, GPO3)

Logic 0 Voltage (IOL = 50 μA)

Full

0.05

DIGITAL INPUT (SYNCINB+, SYNCINB−)

Logic Compliance

CMOS/LVDS

Internal Bias

Full

0.9

Differential Input Voltage Range

Full

0.3

3.6

Input Voltage Range

Full

GND

DRVDD

Input Common-Mode Range

Full

0.9

1.4

High Level Input Current

Full

−5

μA

Low Level Input Current

Full

−5

μA

Input Capacitance

Full

Input Resistance

Full

kΩ

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