AD9675KBCZ datasheet(10/61 Pages) AD

10 / 61 page

Data Sheet

AD9675

Rev. A | Page 9 of 60

SWITCHING SPECIFICATIONS

AVDD1 = 1.8 V, AVDD2 = 3.0 V, DVDD = 1.4 V, DRVDD = 1.8 V, 1.0 V internal ADC reference, L = 2, M = 8, fSAMPLE = 40 MHz, lane

data rate = 3.2 Gbps, full temperature range (0°C to 85°C), unless otherwise noted.

Table 3.

Parameter1

Temperature

Min

Typ

Max

Unit

CLOCK2

Clock Rate (fSAMPLE)

40 MSPS (Mode I)

Full

20.5

MHz

65 MSPS (Mode II)

Full

20.5

MHz

80 MSPS (Mode III)3

Full

20.5

MHz

125 MSPS (Mode IV)4

Full

20.5

125

MHz

Clock Pulse Width High (tEH)

Full

3.75

Clock Pulse Width Low (tEL)

Full

3.75

CLOCK INPUT PARAMETERS

TX_TRIG± to CLK± Setup Time (tSETUP)

25°C

TX_TRIG± to CLK± Hold Time (tHOLD)

25°C

DATA OUTPUT PARAMETERS

Data Output Period or Unit Interval (UI)

Full

L/(20 × M × fSAMPLE)

Seconds

Data Output Duty Cycle

25°C

Data Valid Time

25°C

0.76

PLL Lock Time5

25°C

μs

Wake-Up Time (Standby)

25°C

μs

Wake-Up Time (Power-Down)6

Device

25°C

375

μs

JESD204B Link

25°C

250

μs

SYNCINB± Falling Edge to First K.28 Characters

Full

Multiframes

Code Group Synchronization (CGS) Phase K.28

Characters Duration

Full

Multiframe

Delay (Latency)

Full

ADC Pipeline

Full

Cycles

RF Decimator

Full

Cycles

Digital High-Pass Filter

Full

100

Cycles

TX_TRIG± to Start Code (Mode I/Mode II/Mode III/

Mode IV)

Four-Lane Mode

Full

31/42/30/36

Cycles

Two-Lane Mode

Full

31/33/30/30

Cycles

Data Rate per Lane

25°C

5.0

Gbps

Uncorrelated Bounded High Probability (UBHP) Jitter

25°C

Random Jitter at 2.5 Gbps Data Rate

25°C

ps rms

Random Jitter at 5 Gbps Data Rate

25°C

ps rms

Output Rise/Fall Time

25°C

TERMINATION CHARACTERISTICS

Differential Termination Resistance

Full

100

APERTURE

Aperture Uncertainty (Jitter)

25°C

ps rms

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