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HT66F019 Datasheet(PDF) 117 Page - Holtek Semiconductor Inc |
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HT66F019 Datasheet(HTML) 117 Page - Holtek Semiconductor Inc |
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117 / 175 page ![]() Rev. 1.00 116 De�e��e� 01� �01� Rev. 1.00 11� De�e��e� 01� �01� HT66F019 A/D Flash MCU with EEPROM HT66F019 A/D Flash MCU with EEPROM • SIMC2 Register Bit 7 6 5 4 3 2 1 0 Na�e D� D6 CKPOLB CKEG MLS CSEN WCOL TRF R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 Bit7~6 D7~D6:Undefinedbits Thesebitscanbereadorwrittenbytheapplicationprogram. Bit5 CKPOLB:SPIclocklinebaseconditionselection 0:TheSCKlinewillbehighwhentheclockisinactive 1:TheSCKlinewillbelowwhentheclockisinactive TheCKPOLBbitdeterminesthebaseconditionoftheclockline,ifthebitishigh, thentheSCKlinewillbelowwhentheclockisinactive.WhentheCKPOLBbitis low,thentheSCKlinewillbehighwhentheclockisinactive. Bit4 CKEG:SPISCKclockactiveedgetypeselection CKPOLB=0 0:SCKishighbaselevelanddatacaptureatSCKrisingedge 1:SCKishighbaselevelanddatacaptureatSCKfallingedge CKPOLB=1 0:SCKislowbaselevelanddatacaptureatSCKfallingedge 1:SCKislowbaselevelanddatacaptureatSCKrisingedge TheCKEGandCKPOLBbitsareusedtosetupthewaythattheclocksignaloutputs andinputsdataontheSPIbus.Thesetwobitsmustbeconfiguredbeforedatatransfer isexecutedotherwiseanerroneousclockedgemaybegenerated.TheCKPOLBbit determinesthebaseconditionoftheclockline,ifthebitishigh,thentheSCKline willbelowwhentheclockisinactive.WhentheCKPOLBbitislow,thentheSCK linewillbehighwhentheclockisinactive.TheCKEGbitdeterminesactiveclock edgetypewhichdependsupontheconditionofCKPOLBbit. Bit3 MLS:SPIdatashiftorder 0:LSBfirst 1:MSBfirst Thisisthedatashiftselectbitandisusedtoselecthowthedataistransferred,either MSBorLSBfirst.SettingthebithighwillselectMSBfirstandlowforLSBfirst. Bit2 CSEN:SPISCSpincontrol 0:Disable 1:Enable TheCSENbitisusedasanenable/disablefortheSCSpin.Ifthisbitislow,thenthe SCSpinwillbedisabledandplacedintoI/Opinorotherpin-sharedfunctions.Ifthe bitishigh,theSCSpinwillbeenabledandusedasaselectpin. Bit1 WCOL:SPIwritecollisionflag 0:Nocollision 1:Collision TheWCOLflagisusedtodetectwhetheradatacollisionhasoccurredornot.Ifthis bitishigh,itmeansthatdatahasbeenattemptedtobewrittentotheSIMDregister dutingadatatransferoperation.Thiswritingoperationwillbeignoredifdataisbeing transferred.Thisbitcanbeclearedto0bytheapplicationprogram. Bit0 TRF:SPITransmit/Receivecompleteflag 0:SPIdataisbeingtransferred 1:SPIdatatransferiscompleted TheTRFbitistheTransmit/ReceiveCompleteflagandissetto1automaticallywhen anSPIdatatransferiscompleted,butmustclearedto0bytheapplicationprogram.It canbeusedtogenerateaninterrupt. |
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