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CY28548 Datasheet(PDF) 16 Page - Silicon Laboratories |
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CY28548 Datasheet(HTML) 16 Page - Silicon Laboratories |
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16 / 31 page ![]() CY28548 ......................Document #: 001-08400 Rev ** Page 16 of 30 The CY28548 requires a Parallel Resonance Crystal. Substi- tuting a series resonance crystal causes the CY28548 to operate at the wrong frequency and violates the ppm specifi- cation. For most applications there is a 300-ppm frequency shift between series and parallel crystals due to incorrect loading Crystal Loading Crystal loading plays a critical role in achieving low ppm perfor- mance. To realize low ppm performance, use the total capac- itance the crystal sees to calculate the appropriate capacitive loading (CL). Figure 1 shows a typical crystal configuration using the two trim capacitors. It is important that the trim capacitors are in series with the crystal. It is not true that load capacitors are in parallel with the crystal and are approximately equal to the load capacitance of the crystal. Calculating Load Capacitors In addition to the standard external trim capacitors, consider the trace capacitance and pin capacitance to calculate the crystal loading correctly. Again, the capacitance on each side is in series with the crystal. The total capacitance on both side is twice the specified crystal load capacitance (CL). Trim capacitors are calculated to provide equal capacitive loading on both sides. , Use the following formulas to calculate the trim capacitor values for Ce1 and Ce2. 7 0 SMSW_EN Enable Smooth Switching 0 = Disabled, 1= Enabled 6 0 SMSW_SEL Smooth switch select 0 = CPU_PLL, 1 = SRC_PLL 5 0 SE1/SE2 drive strength 2 of 2 SE1 and SE2 drive strength Setting 2 of 2 4 0 Prog_PCI-E_EN Programmable PCI-E frequency enable 0 = Disabled, 1= Enabled 3 0 Prog_CPU_EN Programmable CPU frequency enable 0 = Disabled, 1= Enabled 2 0 REF drive strength 2 of 2 REFdrive strength strength Setting 2 of 2 1 0 USB drive strength 2 of 2 USB drive strength strength Setting 2 of 2 0 0 PCI/ PCIF drive strength 2of 2 PCI drive strength strength Setting 2 of 2 Byte 17: Control Register 17 (continued) Table 5. Crystal Recommendations Frequency (Fund) Cut Loading Load Cap Drive (max.) Shunt Cap (max.) Motional (max.) Tolerance (max.) Stability (max.) Aging (max.) 14.31818 MHz AT Parallel 20 pF 0.1 mW 5 pF 0.016 pF 35 ppm 30 ppm 5 ppm Figure 1. Crystal Capacitive Clarification XTAL Ce 2 Ce 1 Cs 1 Cs 2 X1 X2 Ci1 Ci2 Clo c k Ch ip Tr a c e 2. 8pF Tr im 33pF Pin 3 t o 6p Figure 2. Crystal Loading Example Load Capacitance (each side) Total Capacitance (as seen by the crystal) Ce = 2 * CL – (Cs + Ci) Ce1 + Cs1 + Ci1 1 + Ce2 + Cs2 + Ci2 1 ( ) 1 = CLe |
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