SI3050 datasheet(53/128 Pages) SILABS

53 / 128 page

Si3050 + Si3011/18/19

Rev. 1.5

In this manner, multiple consecutive registers can be read or written in one transmission sequence. By correctly

manipulating the MX and MR bits, a transmission sequence can continue from the beginning specified address

until an invalid memory location is reached. To end a transmission sequence, the host processor must signal an

end-of-message (EOM) by placing the downstream MX and MR bits inactive for two consecutive frames. The

transmission also can be stopped by the Si3050 by signaling an Abort. This is signaled by placing the upstream

MR bit inactive for at least two consecutive cycles in response to the downstream MX bit going active. An abort is

signaled by the Si3050 for the following reasons:



A read or write to an invalid memory address is attempted



An invalid command sequence is received



A data byte was not received for at least two consecutive frames



A collision occurs on the Monitor data bytes while the Si3050 is transmitting data

When the Si3050 aborts because of an invalid command sequence, the state of the Si3050 does not change. If a

read or write to an invalid memory address is attempted, all previous reads or writes in that transmission sequence

are valid up to the read or write to the invalid memory address. If an EOM is detected before a valid command

sequence is communicated, the Si3050 returns to the idle state and remains unchanged.

Si3050 Datasheet(PDF) 53 Page - Silicon Laboratories