S34MS02G2 datasheet(50/74 Pages) CYPRESS

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Document Number: 002-03238 Rev. *E

Page 50 of 74

S34MS01G2

S34MS02G2

S34MS04G2

6.18

Multiplane Copy Back Program — S34MS02G2 and S34MS04G2

Figure 6.20 Multiplane Copy Back Program

Notes:

1. Copy Back Program operation is allowed only within the same memory plane.

2. Any command between 11h and 81h is prohibited except 70h, 78h, and FFh.

3. A18 is the plane address bit for x8 devices. A17 is the plane address bit for x16 devices.

I/Ox

R/B#

I/Ox

tDBSY

tPROG

00h

Add. (5 cycles)

35h

Col. Add. 1, 2 and Row Add. 1, 2, 3

Source Address on Plane 0

00h

Add. (5 cycles)

35h

Col. Add. 1, 2 and Row Add. 1, 2, 3

Source Address on Plane 1

85h

Add. (5 cycles)

11h

Col. Add. 1, 2 and Row Add. 1, 2, 3

Destination Address

A0 ~ A11 : Fixed ‘Low’

A12 ~ A17 : Fixed ‘Low’

A18

: Fixed ‘Low’

A19 ~ A28 : Fixed ‘Low’

81h

Add. (5 cycles)

Col. Add. 1, 2 and Row Add. 1, 2, 3

Destination Address

A0 ~ A11 : Fixed ‘Low’

A12 ~ A17 : Valid

A18

: Fixed ‘High’

A19 ~ A28 : Valid

10h

70h

Plane 0

(1)

(3)

Data Field

Spare Field

Plane 1

(2)

(3)

Data Field

Spare Field

Source Page

Target Page

(1) : Copy Back Read on Plane 0

(2) : Copy Back Read on Plane 1

(3) : Multiplane Copy Back Program

(Note 2)

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