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MP2235S Datasheet(PDF) 15 Page - Monolithic Power Systems |
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MP2235S Datasheet(HTML) 15 Page - Monolithic Power Systems |
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15 / 19 page ![]() MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER MP2235S Rev.1.0 www.MonolithicPower.com 15 4/15/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. make sure that they have enough capacitance to provide sufficient charge in order to prevent excessive voltage ripple at the input. The input voltage ripple caused by capacitance can be estimated using Equation (7): LOAD OUT OUT IN IN SIN IV V V1 fC1 V V ⎛⎞ Δ= × × − ⎜⎟ × ⎝⎠ (7) Selecting the Output Capacitor The output capacitor (C2) maintains the DC output voltage. Use ceramic, tantalum, or low ESR electrolytic capacitors. For best results, use low ESR capacitors to keep the output voltage ripple low. The output voltage ripple can be estimated with Equation (8): OUT OUT OUT ESR S1 IN S VV 1 V1 R fL V 8 f C2 ⎛⎞ ⎛⎞ Δ= × − × + ⎜⎟ ⎜⎟ ×× × ⎝⎠ ⎝⎠ (8) Where L1 is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. For ceramic capacitors, the capacitance dominates the impedance at the switching frequency, and the capacitance causes the majority of the output voltage ripple. For simplification, the output voltage ripple can be estimated with Equation (9): OUT OUT OUT 2 IN S1 VV ΔV1 V 8f L C2 ⎛⎞ =× − ⎜⎟ ×× × ⎝⎠ (9) For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated with Equation (10): OUT OUT OUT ESR IN S1 VV ΔV1 R fL V ⎛⎞ =× − × ⎜⎟ × ⎝⎠ (10) The characteristics of the output capacitor affect the stability of the regulation system. The MP2235S can be optimized for a wide range of capacitance and ESR values. External Bootstrap Diode In particular conditions, the BST voltage may become insufficient. During these conditions, an external bootstrap diode can enhance the efficiency of the regulator and avoid insufficient BST voltage at light-load PFM operation. Insufficient BST voltage is more likely to occur during either of the following conditions: VOUT is 5 V or 3.3 V; or the duty cycle is high: D= IN OUT V V >65% If the BST voltage is insufficient, the output ripple voltage may become extremely large during a light-load condition. If this occurs, add an external BST diode from VCC to BST (see Figure 8). MP2235S Figure 8—Optional external bootstrap diode to enhance efficiency The recommended external BST diode is IN4148, and the BST capacitor value is 0.1 µF to 1 μF. PCB Layout Guidelines (9) Efficient PCB layout is critical to achieve stable operation, especially for VCC capacitor and input capacitor placement. For best results, refer to Figure 9 and follow the guidelines below: 1. Use a large ground plane directly connected to GND. Add vias near GND if the bottom layer is ground plane. 2. Place the VCC capacitor as close as possible to the chip VCC and GND. Make the trace length of VCC pin to the VCC capacitor anode to the VCC capacitor cathode to the chip GND as short as possible. 3. Place the ceramic input capacitor close to IN and GND. Keep the connection of the input capacitor and IN as short and wide as possible. 4. Route SW and BST away from sensitive analog areas such as FB. 5. Place the T-type feedback resistor (R5) close to the chip to ensure the trace (which connects to FB) is as short as possible. NOTES: 9) The recommended layout is based on Figure 10 on page 17. |
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