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MP110 Datasheet(PDF) 14 Page - Monolithic Power Systems |
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MP110 Datasheet(HTML) 14 Page - Monolithic Power Systems |
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14 / 23 page ![]() MP110 – 900V OFFLINE SWITCHING REGULATOR on, the IC implements leading-edge blanking. During the blanking time, any trigger signal on source pin is blocked. An internal leading-edge blanking(LEB) unit containing two LEB times is employed between the Source pin and the current comparator input to avoid premature switching pulse termination due to the parasitic capacitances. During the blanking time, the current comparator is disabled and can not turn off the MOSFET. Current sensor leading edge blanking inhibits the current limitation comparator during 650ns (TLEB1, typical value) and SCP leading edge blanking inhibits the SCP current comparator during 600ns (TLEB2, typical value). Figure 5 shows the primary current sense waveform and the leading edge blanking. TLEB1=650ns TLEB2=600ns Figure 5: Leading Edge Blanking MP110 Rev. 1.01 www.MonolithicPower.com 14 6/4/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. |
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