LTC4371 datasheet(5/22 Pages) LINER

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LTC4371

4371f

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pin FuncTions

DA, DB (Pins 1 and 10): Drain Voltage Kelvin Sense In-

puts. DA and DB connect to the drains of the N-channel

MOSFETs. The voltage sensed by SA – DA and SB – DB

is used to control the gate drive and hence the ∆VSD drop

across the MOSFETs, and it is also used for fault detection.

For accurate Kelvin sensing of ∆VSD, connect these pins

as closely as possible to the MOSFET drains. An external

resistor protects the DA and DB pins from transients ex-

ceeding 100V. If the LTC4371 is used in a single channel

application,DAandDBmaybejoinedtogetherandoperated

in parallel; otherwise connect the unused drain pin to VSS.

Exposed Pad (Pin 11 – DD Package Only): Exposed pad

may be left open or connected to VSS.

FAULTB (Pin 7): Fault Output. Open drain output that pulls

low to indicate that one or both of the external MOSFETs

have failed open. FAULTB can sink up to 5mA to drive an

opto isolator or LED. The maximum allowable pull-up

voltage is 17V. Connect to VSS if unused.

GA, GB (Pins 2 and 9): Gate Drive Outputs. GA and GB

operate between VSS and VDD to control their associated

MOSFET gates and emulate the behavior of a diode. For

∆VSD >15mV, the gate pin drives the MOSFET on, while

∆VSD <15mV produces the opposite effect. With a large

positive ∆VSD, the gate pin pulls up with a strong 5mA

source, while large negative ∆VSD activates a 2A pull-

down with a maximum propagation delay of 220ns. If the

LTC4371 is used in a single channel application, the gate

pins may be joined together and operated in parallel to

realizeatwo-foldincreaseingatedrivestrength;otherwise

the unused gate pin may be left open.

SA, SB (Pins 3 and 8): Source Voltage Kelvin Sense In-

puts. SA and SB connect to the sources of the N-channel

MOSFETs. The voltage sensed by SA – DA and SB – DB

is used to control the gate drive and hence the ∆VSD drop

across the MOSFETs, and it is also used for fault detection.

For accurate Kelvin sensing of ∆VSD,connectthesepinsas

close as possible to the MOSFET sources. If the LTC4371

is used in a single channel application, SA and SB may be

joinedtogetherandoperatedinparallel;otherwiseconnect

the unused source pin to VSS.

VDD (Pin 5): Positive Supply Voltage Input. Supply VDD

directly from 4.5V to 16V, or in shunt regulated applica-

tions connect directly or through a buffer transistor biased

by VZ. When connected directly to VZ, bypass VDD with

2.2μFtoVSS.MaximumgatedrivevoltageislimitedtoVDD.

VSS (Pin 6): Device Substrate and Negative Supply Volt-

age. VSS connects to VOUT at the joined sources of the

N-channel MOSFETs.

VZ (Pin 4): Shunt Regulator Supply Input. This pin serves

as a shunt regulator for the VDD pin or as a regulator refer-

ence, and operates with a bias of 50μA to 10mA. Bypass

with at least 100nF when used as a reference, and 2.2μF

when connected to the VDD pin. If unused, connect VZ to

VSS. See “Strong Gate Pull-Up” in the Applications Infor-

mation for details on the relationship between the VZ pin

voltage and gate pin drive strength.

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