LT8584 datasheet(13/36 Pages) LINER

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LT8584

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operaTion

SWITCH PROTECTION

Several protection features are included to reduce the

likelihood of permanent damage to the internal power

NPNswitch:theshort-circuitdetector,thehigh-impedance

detector, the switch overvoltage protection (OVP), and

internal undervoltage lockout (UVLO). These also alert

the user when the integrity of the discharge converter

has been compromised because of a fault. Switching is

disabled during fault conditions.

Short-Circuit Detector

The short-circuit detector detects when the power NPN

switch turns off prematurely due to a short in the primary-

side winding. If the current comparator trips before the

850ns short detection timeout, the switch error latch will

trip. The OUT pin is driven to VVIN – 1.2V, VSW,ERR, during

a switch error. The part must be reset to clear the switch

error fault.

High-Impedance Detector

Thehigh-impedancedetectormonitorshowlongthepower

NPN switch has been on. If the switch remains on longer

than 50µs, the switch maximum on-time, the switch error

latchissetandtheOUTpinisdriventoVVIN–1.2V,VSW,ERR.

The part must be reset to clear the switch error fault.

Overvoltage Protection (OVP)

The OVP circuitry dynamically clamps the NPN collector’s

SW pins to 50V. This protects the internal power switch

from entering breakdown and causing permanent dam-

age. The clamp is also used as a primary-side snubber to

absorb the leakage inductance energy. The 200ns switch

clamp blanking time determines if the clamp is absorbing

a leakage spike or if the switch is turning off while the

secondary of the transformer is open. If the switch clamp

is on longer than approximately 200ns, the switch error

latch is set. The part must be reset to clear the switch

error fault.

Internal Undervoltage Lockout (UVLO)

LT8584protectsitselfduringaUVLOconditionbydisabling

switching. The OUT pin is driven to VVIN – 1.4V, VFAULT,

during a UVLO condition. A UVLO fault is non-latching and

dominates over a switch fault (Serial Mode requires VIN

to remain above 2V for a UVLO fault to be non-latching).

Once the UVLO condition is cleared, the OUT pin reverts

to normal operation and switching resumes. If the switch

fault latch was tripped prior to the UVLO event, the OUT pin

will indicate a switch fault, VSW,ERR, only after the UVLO

condition is cleared and switching would remain disabled.

Figure 2. Simple Mode Configurations

LT8584

LOCAL

IC GND

LOCAL

IC GND

LOCAL

IC GND

LOCAL

IC GND

STACK+

STACK–

VSNS VCELL

GND RTMR

DIN

VIN

MODE

DCHRG

OUT

•

ACTIVE LOW

8584 F02

OFF

LT8584

STACK+

STACK–

VSNS VCELL

GND RTMR

DIN

VIN

MODE

DCHRG

OUT

•

ACTIVE HIGH

OFF

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