LTC3351 datasheet(20/56 Pages) LINER

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LTC3351

3351f

For more information www.linear.com/LTC3351

OPERATION

swap controller must have completed connecting VIN and

VOUT. The state of the VINGD pull down is read from the

vingd bit in the sys_status register.

If UV is set to a level near or less than the charge voltage

of the capacitors, VIN becomes high impedance and the

VOUT load is very low, it is possible for a small amount

of current to flow from VCAP to VIN through VOUT due to

the maximum duty cycle operation. In this condition, the

high duty cycle buck is effectively a reverse low duty cycle

boost. The boost has a small amount of output current

that holds VIN above VCAP and possibly UV, causing the

part to falsely indicate VINGD. Eventually VCAP will be

discharged below the programmed UV threshold and

VINGDwillindicatecorrectly.Thissituationcanbeavoided

by programming the UV threshold at least 3% above the

capacitor charge voltage.

Ideal Diode

The LTC3351 has an ideal diode controller that drives an

external N-channel MOSFET between VCAP and VOUT. The

ideal diode consists of a precision amplifier that drives

the gates of N-channel MOSFETs whenever the voltage at

VOUT is approximately 30mV (VFR) below the voltage at

VCAP. Within the amplifier’s linear range, the small-signal

resistance of the ideal diode will be quite low, keeping the

forward drop near 30mV. At higher current levels, the

MOSFETs will be in full conduction.

The ideal diode provides a path for the supercapacitors to

powerVOUTwhenVINisunavailableorthehotswapcontrol-

ler is disconnected. In addition to a Fast-Off comparator,

the ideal diode also has a Fast-On comparator that turns

on the external MOSFET when VOUT drops 65mV (VFTO)

below VCAP. The ideal diode will shut off when OUTFB is

just above regulation allowing the synchronous controller

to power VOUT in step-up mode.

Gate Drive Supply (DRVCC)

The bottom gate driver is powered from the DRVCC pin,

which is normally connected to the INTVCC pin. An ex-

ternal LDO can also be used to power the gate drivers to

minimize power dissipation inside the LTC3351. See the

Applications Information section for details.

Switcher/Charger Undervoltage Lockout (UVLO)

Internal undervoltage lockout circuits monitor both the

INTVCC and DRVCC pins. The switching controller is kept

off until INTVCC rises above VUVLO (4.3V) and DRVCC rises

above VDRVUVLO (4.2V). The controller is disabled if either

INTVCC falls below 4V or DRVCC falls below 3.9V.

Charging is disabled until VOUT is VDUVLO (200mV) above

the supercapacitor voltage and VINGD is high. Charging

is disabled when VOUT falls to within 90mV of the super-

capacitor voltage or when VINGD is low.

RT Oscillator and Switching Frequency

The RT pin is used to program the switching frequency.

A resistor, RT, from this pin to ground sets the switching

frequency according to:

fSW MHz

(

) =

53.5

RT kΩ

( )

RT also sets the scale factor for the capacitor measure-

ment value reported in the meas_cap register, described

in the ESR and Capacitance Measurement section of this

data sheet.

Switching Controller Input Overvoltage Protection

Input overvoltage protection turns off both switching

controller switches if VIN exceeds VOVLO (38.6V). The

controller will resume switching if VIN falls below 37.2V.

The hot swap controller is unaffected by this and uses its

own programmable OV threshold.

VCAP DAC

The feedback reference for the CAPFB servo point is

programmed using an internal 4-bit digital-to-analog

converter (DAC). The reference voltage is programmable

from 0.6375V (VCAPFBLO) to 1.2V (VCAPFBHI) in 37.5mV

increments.TheDACdefaultsto0xA(VCAPFB_DEF1.0125V)

and is programmed via the vcapfb_dac register.

Supercapacitors lose capacitance as they age. By initially

setting the VCAP DAC to a low setting, the final charge

voltage on the supercapacitors can be increased as they

age to maintain a constant level of stored backup en-

ergy throughout the lifetime of the supercapacitors. The

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