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LTC3371 Datasheet(PDF) 5 Page - Linear Technology |
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LTC3371 Datasheet(HTML) 5 Page - Linear Technology |
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5 / 26 page ![]() LTC3371 5 3371fb For more information www.linear.com/LTC3371 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VCC = VINA-H = 3.3V, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Buck Regulators Combined IFWD2 PMOS Current Limit 2 Buck Power Stages Combined (Note 5) 4.6 A IFWD3 PMOS Current Limit 3 Buck Power Stages Combined (Note 5) 6.9 A IFWD4 PMOS Current Limit 4 Buck Power Stages Combined (Note 5) 9.2 A Interface Logic Pins (RST1-4, WDO, WDI, PLL/MODE, C1, C2, C3) IOH Output High Leakage Current RST1-4, WDO 5.5V at Pin 1 µA VOL Output Low Voltage RST1-4, WDO 3mA into Pin 0.1 0.4 V VIH WDI Input High Threshold l 1.2 V VIL WDI, C1, C2, C3 Input Low Threshold l 0.4 V tWDI(WIDTH) WDI Pulse Width l 40 ns VIH PLL/MODE, C1, C2, C3 Input High Threshold l VCC – 0.4 V VIL PLL/MODE Input Low Threshold l VCC – 1.2 V Interface Logic Pins (EN1, EN2, EN3, EN4) VHI(ALLOFF) Enable Rising Threshold All Regulators Disabled l 730 1200 mV VHI Enable Rising Threshold At Least One Regulator Enabled l 400 420 mV VLO Enable Falling Threshold 340 390 mV IEN Enable Pin Leakage Current EN = 3.3V 1 µA CT Timing Parameters; CT = 10nF tWDI0 Time from WDO Low Until Next WDO Low CT = 10nF l 10.3 6.2 12.9 12.9 15.5 Sec Sec tWDI Time from Last WDI Until Next WDO Low CT = 10nF l 1.30 0.77 1.62 1.62 1.95 Sec Sec tWDL Watchdog Lower Boundary CT = 10nF l 40 50.6 50.6 60 65 ms ms tWDO WDO Low Time Absent a Transition at WDI CT = 10nF 160 202 280 ms tRST RST Assertion Delay CT = 10nF 160 202 240 ms Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3371 is tested under pulsed load conditions such that TJ ≈ TA. The LTC3371E is guaranteed to meet specifications from 0°C to 85°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3371I is guaranteed over the –40°C to 125°C operating junction temperature range. The LTC3371H is guaranteed over the –40°C to 150°C operating junction temperature range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125°C. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. The junction temperature (TJ in °C) is calculated from the ambient temperature (TA in °C) and power dissipation (PD in Watts) according to the formula: TJ = TA + (PD • θJA) where θJA (in °C/W) is the package thermal impedance. Note 3: The LTC3371 includes overtemperature protection which protects the device during momentary overload conditions. Junction temperatures will exceed 150°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 4: Static current, switches not switching. Actual current may be higher due to gate charge losses at the switching frequency. Note 5: The current limit features of this part are intended to protect the IC from short term or intermittent fault conditions. Continuous operation above the maximum specified pin current rating may result in device degradation over time. |
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