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THCV213 Datasheet(PDF) 3 Page - THine Electronics, Inc. |
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THCV213 Datasheet(HTML) 3 Page - THine Electronics, Inc. |
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3 / 19 page ![]() THCV213-214_Rev.2.40_E Copyright©2014 THine Electronics, Inc. THine Electronics, Inc. 3/19 PIN Description THCV213 Pin Description PIN Name PIN No Type Description TXOUT1-,TXOUT1+ 20, 19 LVDSOUT LVDS output. TXOUT2-,TXOUT2+ 16, 15 LVDSOUT LVDS output for Dual Display mode. Identical to TXOUT1+/-. Hi-Z when Normal operation. D0-D17 32, 33, 34, 35, 37, 38, 39, 40, 41, 43, 44, 45, 46, 47, 1, 2, 3, 4 IN Data input. Active if input DE=High SYNC2-SYNC0 27, 28, 29 IN Sync input. Active if input DE =Low. Input sync data pulse must be wider than or equal to two input clock periods. DE 30 IN Data Enable (DE) input. Refer to Table2 for requirements. CLKIN 6 IN Clock input. 5 MHz to 40MHz. PDWN 10 IN H: Normal operation. L: Power Down, TXOUT1+/-, (TXOUT2+/-) are Hi-Z. EDGE 23 IN Input clock triggering edge select. H: Rise edge, L: Fall edge. PRE0, PRE1 11, 12 IN Select the level of pre-emphasis. PRE1 PRE0 Description L L w/o Pre-Emphasis L H w/ 25% Pre-Emphasis H L w/ 50% Pre-Emphasis H H w/ 100% Pre-Emphasis INIT 25 IN H: Triggers SYNC pattern output fromTXOUT1+/- and (TXOUT2+/-), normally used in Shake Hand mode. L: Normal operation. DUAL 9 IN H: Dual Display mode Both TXOUT1+/- and TXOUT2+/- enabled. L: Normal operation Only TXOUT1+/- enabled. PRBS 8 IN H: Internal test pattern generator is enabled. Pseudo-Random Bit Sequence (PRBS) is generated and is fed into input data latches. Normally used for debug. L: Normal operation. VDD 7, 26, 36, 48 Power Power supply pins for digital circuitry. GND 5, 22, 24, 31, 42 Power Ground pins for digital circuitry. LVDSVDD 17 Power Power supply pin for LVDS output. LVDSGND 18, 21 Power Ground pins for LVDS output. PLLVDD 13 Power Power supply pin for PLL circuitry. PLLGND 14 Power Ground pin for PLL circuitry. |
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