LTC3883 datasheet(7/22 Pages) LINER

7 / 22 page

LTC3870

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FAULT0/FAULT1 (Pin 26/Pin 25): Fault Input Pins. Con-

nect these pins to the master chip GPIO pins to respond

to fault signals from the master controller. If this pin is

low, both TG and BG pins are pulled down at the corre-

sponding channel. There is a 500k pull down resistor on

FAULT0/FAULT1 internally. These pins have to be driven

high externally for normal operation.

FREQ (Pin 27): Frequency Set Pin. There is a precision

10µA current flowing out of this pin. A resistor to ground

sets a voltage which in turn programs the frequency. This

pin FuncTions

pin sets the default switching frequency when there is no

external clock on the SYNC pin. Set the frequency close

to the external clock to help the internal PLL sync to the

SYNC pin clock quickly and smoothly. See the application

section for the detailed information.

SGND (Exposed Pad Pin 29): Signal Ground. All small-

signal and compensation components should connect to

this ground, which in turn connects to PGND at one point.

The exposed pad must be soldered to the PCB, providing

a local ground for the control components of the IC, and

be tied to PGND under the IC.

LTC3883 Datasheet(PDF) 7 Page - Linear Technology