LTC3859AL datasheet(11/38 Pages) LINER

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LTC3899

3899fa

For more information www.linear.com/LTC3899

PIN FUNCTIONS (QFN/TSSOP)

FREQ (Pin 1/ Pin 5): The frequency control pin for the

internal VCO. Connecting this pin to GND forces the VCO

to a fixed low frequency of 350kHz. Connecting this pin

to INTVCC forces the VCO to a fixed high frequency of

535kHz.Otherfrequenciesbetween50kHzand900kHzcan

be programmed using a resistor between FREQ and GND.

The resistor and an internal 20µA source current create a

voltage used by the internal oscillator to set the frequency.

PLLIN/MODE (Pin 2/Pin 6): External Synchronization

Input to Phase Detector and Forced Continuous Mode

Input. When an external clock is applied to this pin, the

phase-locked loop will force the rising TG1 signal to be

synchronized with the rising edge of the external clock,

and the regulators will operate in forced continuous mode.

When not synchronizing to an external clock, this input,

which acts on all three controllers, determines how the

LTC3899 operates at light loads. Pulling this pin to ground

selects Burst Mode operation. An internal 100k resistor to

ground also invokes Burst Mode operation when the pin is

floated.TyingthispintoINTVCCforcescontinuousinductor

current operation. Tying this pin to a voltage greater than

1.1V and less than INTVCC – 1.3V selects pulse-skipping

operation. This can be done by connecting a 100k resistor

from this pin to INTVCC.

INTVCC (Pin 8/Pin 12): Output of the Internal 5V Low

Dropout Regulator. The low voltage analog and digital

circuits are powered from this voltage source. A low ESR

0.1µF ceramic bypass capacitor should be connected

between INTVCC and GND, as close as possible to the IC.

INTVCC should not be used to power or bias any external

circuitry other than to configure FREQ, PLLIN/MODE,

DRVSET AND VPRG3 pins.

RUN1, RUN2, RUN3 (Pins 9, 10, 11/ Pins 13, 14, 15):

RunControlInputsforEachController.Forcinganyofthese

pins below 1.2V shuts down that controller. Forcing all of

these pins below 0.7V shuts down the entire LTC3899,

reducing quiescent current to approximately 3.6µA.

DRVSET (Pin 16/Pin 20): Sets the regulated output volt-

age of the DRVCC LDO regulator. Connecting this pin to

GND sets DRVCC to 6V whereas connecting it to INTVCC

sets DRVCC to 10V. Voltages between 5V and 10V can be

programmed by placing a resistor (50k to 100k) between

theDRVSETpinandGND.TheDRVSETpinalsodetermines

the higher or lower DRVCC UVLO and EXTVCC switchover

thresholds, as listed on the Electrical Characteristics table.

ConnectingDRVSETtoGNDorprogrammingDRVSETwith

a resistor chooses the lower thresholds whereas tying

DRVSET to INTVCC chooses the higher thresholds. When

programming DRVSET with a resistor, do not choose a

resistor value less than 50k (unless shorting DRVSET to

GND) or higher than 100k.

DRVCC (Pin 22/Pin 26): Output of the Internal or External

Low Dropout (LDO) Regulator. The gate drivers are pow-

ered from this voltage source. The DRVCC voltage is set

by the DRVSET pin. Must be decoupled to ground with a

minimum of 4.7µF ceramic or other low ESR capacitor.

Do not use the DRVCC pin for any other purpose.

EXTVCC (Pin 23/Pin 27): External Power Input to an Inter-

nal LDO Connected to DRVCC. This LDO supplies DRVCC

power, bypassing the internal LDO powered from VBIAS

whenever EXTVCC is higher than its switchover threshold

(4.7V or 7.7V depending on the DRVSET pin). See EXTVCC

ConnectionintheApplicationsInformationsection.Donot

float or exceed 14V on this pin. Do not connect EXTVCC to

a voltage greater than VBIAS. Connect to GND if not used.

VBIAS(Pin24/Pin28):MainSupplyPin.Abypasscapacitor

should be tied between this pin and the GND pin.

BG1, BG2, BG3 (Pins 29, 21, 25/Pins 33, 25, 29): High

Current Gate Drives for Bottom N-Channel MOSFETs.

Voltage swing at these pins is from ground to DRVCC.

BOOST1, BOOST2, BOOST3 (Pins 30, 20, 26/Pins 34,

24, 30): Bootstrapped Supplies to the Topside Floating

Drivers.CapacitorsareconnectedbetweentheBOOSTand

SW pins. Voltage swing at BOOST1 and BOOST2 pins is

from approximately DRVCC to (VIN1,2 + DRVCC). Voltage

swing at BOOST3 is from DRVCC to (VOUT3 + DRVCC).

SW1, SW2, SW3 (Pins 31, 19, 28/Pins 35, 23, 32):

Switch Node Connections to Inductors.

TG1, TG2, TG3 (Pins 32, 18, 27/Pins 36, 22, 31): High

CurrentGateDrivesforTopN-ChannelMOSFETs.Theseare

the outputs of floating drivers with a voltage swing equal

to DRVCC superimposed on the switch node voltage SW.

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