LTC3859AL datasheet(32/38 Pages) LINER

32 / 38 page

LTC3899

3899fa

For more information www.linear.com/LTC3899

APPLICATIONS INFORMATION

PC Board Layout Checklist

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

IC. Figure 11 illustrates the current waveforms present in

the various branches of the 2-phase synchronous buck

regulators operating in the continuous mode. Check the

following in your layout:

1. Are the top N-channel MOSFETs MTOP1 and MTOP2

located within 1cm of each other with a common drain

connection at CIN? Do not attempt to split the input

decoupling for the two channels as it can cause a large

resonant loop.

2. Are the signal and power grounds kept separate? The

combined IC signal ground pin and the ground return

of CDRVCC must return to the combined COUT (–) termi-

nals. The path formed by the top N-channel MOSFET,

Schottky diode and the CIN capacitor should have short

leads and PC trace lengths. The output capacitor (–)

terminals should be connected as close as possible

to the (–) terminals of the input capacitor by placing

the capacitors next to each other and away from the

Schottky loop described above.

3. Does the LTC3899 VFB pins’ resistive divider connect to

the (+) terminal of COUT? The resistive divider must be

connected between the (+) terminal of COUT and signal

ground. The feedback resistor connections should not

be along the high current input feeds from the input

capacitor(s).

RL1

SW1

RSENSE1

VOUT1

COUT1

VIN

CIN

RIN

RL2

BOLD LINES INDICATE

HIGH SWITCHING

CURRENT. KEEP LINES

TO A MINIMUM LENGTH.

SW2

3899 F12

RSENSE2

VOUT2

COUT2

Figure 11. Branch Current Waveforms for Bucks

LTC3859AL Datasheet(PDF) 32 Page - Linear Technology

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