ISL8225M

FN7822 Rev 2.00

Page 6 of 34

December 8, 2014

Pin Descriptions

PIN#

PIN

NAME

TYPE

DESCRIPTION

21, 1

VSEN1-, VSEN2-

I

Output voltage negative feedback. Negative input of the differential remote sense for the regulator. Connect to the

negative rail or ground of the load/processor, as shown in Figure 19. The negative feedback pins can be used to

program the module operation conditions. See Tables 3 and 5 for details.

20, 2

COMP1, COMP2 I/O Error amplifier outputs. Typically floating for dual-output use. For parallel use, a 470pF~1nF capacitor is recommended

on the COMP pins of each SLAVE phase to eliminate the coupling noise. All COMP pins of SLAVE phases need to tie to

MASTER phase COMP1 pin (first phase). Internal compensation networks are implemented for working in the full range

of I/O conditions.

3MODE

I

Mode setting. Typically floating for dual-output use; tie to SGND for parallel use. See Tables 3 and 5 for details. When

VSEN2- is pulled within 700mV of VCC, the 2nd channel’s remote sensing amplifier is disabled. The MODE pin, as well

as the VSEN2+ pin, determine relative phase-shift between the two channels and the CLKOUT signal output.

18, 4

VMON1, VMON2 I/O Remote sensing amplifier outputs. These pins are connected internally to OV/UV/PGOOD comparators, so they can’t

be floated when the module works in multi-phase operation. When VSEN1-, VSEN2- are pulled within 700mV of VCC,

the corresponding remote sensing amplifier is disabled; the output (VMON pin) is in high impedance. In this event, the

VMON pins can be used as an additional monitor of the output voltage, with a resistor divider to protect the system

against single point of failure. The default setting voltage is 0.6V. See Table 3 for details.

5SYNC

I

switching frequency (Figure 33 and Table 1). The internal default frequency is 500kHz with this pin floating. Also, the

internal oscillator can lock to an external frequency source or the CLKOUT signal from another ISL8225M. Input voltage

range for external source: 3V to 5V square wave. No capacitor is recommended on this pin.

6SGND

for the connection between SGND and PGND to avoid noise coupling. See “Layout Guide” on page 27.

7VCC

PWR 5V internal linear regulator output. Voltage range: 3V to 5.6V. The decoupling ceramic capacitor for the VCC pin is

recommended to be 4.7µF.

14, 8

VIN1, VIN2

PWR Power inputs. Input voltage range: 4.5V to 20V. Tie directly to the input rail. VIN1 provides power to the internal linear

drive circuitry. When the input is 4.5V to 5.5V, VIN should be tied directly to VCC.

9, 13

PGND

PWR Power ground. Power ground pins for both input and output returns.

12, 10

PHASE1,

PHASE2

PWR Phase node. Use for monitoring switching frequency. Phase pins should be floating or used for snubber connections.To

achieve better thermal performance, the phase planes can also be used for heat removal with thermal vias connected

to large inner layers. See “Layout Guide” on page 27

11

N/C

-

Non-connection pin. This pin is floating with no connection inside.

15, 16

EN/FF1,

EN/FF2

I/O Enable and feed-forward control. Tie a resistor divider to VIN or use the system enable signal for this pin. The voltage

turn-on threshold is 0.8V. With a voltage lower than the threshold, the corresponding channel can be disabled

independently. By connecting to VIN with a resistor divider, the input voltage can be monitored for UVLO (undervoltage

lockout) function. The voltage on each EN/FF pin is also used to adjust the internal control loop gain independently to

realize the feed-forward function. Please set the EN/FF between 1.25V to 5V. A 1nF capacitor is recommended on each

EN/FF pin. Please see Table 1 to select resistor divider and application details in “EN/FF Turn ON/OFF” on page 23.

17

CLKOUT

I/O Clock out. Provide the clock signal for the input synchronization signal of other ISL8225Ms. Typically tied to VCC for

dual-output use with 180° phase-shift. See Tables 3 and 5 when using more than one ISL8225M. When the module is

in dual-output mode, the clock-out signal is disabled. By programming the voltage level of this CLKOUT pin, the module

19

ISHARE

O

Current sharing control. Tie all ISHARE pins together when multiple modules are configured for current sharing and

share a common current output. The ISHARE voltage represents the average current of all active and connected

channels. A 470pF capacitor is recommended for each ISHARE pin for multiple phase applications. Typically, the

ISHARE pin should be floating for dual-output or single module application.

22, 26

VSEN1+,

VSEN2+

I

Output voltage positive feedback. Positive inputs of differential remote sense for the regulator. A resistor divider can

be connected to this pin to program the output voltage. It is recommended to put the resistor divider close to the

module and connect the kelvin sensing traces of VOUT and VSEN- to the sensing points of the load/processor (see

Figure 19). The VSEN2+ pin can be used to program the module operation conditions. See Tables 3 and 5 for details.

23, 25

VOUT1, VOUT2 PWR Power Output. Apply output load between these pins and PGND pins. Output voltage range: 0.6V to

24

PGOOD

O

Power good. Provide open-drain power-good signal when the output is within 9% of the nominal output regulation point

with 4% hysteresis (13%/9%) and soft-start complete. PGOOD monitors the outputs (VMON) of the internal differential

amplifiers.