ISL8225MEVAL4Z datasheet(25/34 Pages) RENESAS

25 / 34 page

ISL8225M

FN7822 Rev 2.00

Page 25 of 34

December 8, 2014

Current Share

In parallel operations, the share bus voltages (ISHARE) of

different modules must tie together. The ISHARE pin voltage is

set by an internal resistor and represents the average current of

all active modules. The average current signal is compared with

the local module current, and the current share error signal is fed

into the current correction block to adjust each module’s PWM

pulse accordingly. The current share function provides at least

10% overall accuracy between modules. The current share bus

works for up to 12 phases without requiring an external clock. A

470pF ~1nF capacitor is recommended for each ISHARE pin.

In current sharing scheme, all slave channels have the feedback

loops disabled with the VSEN- pin tied to VCC. The master

channel can control all modules with COMP and ISHARE pins tied

together. For phase-shift setting, all VMON pins of slave channels

are needed to set 0.6V for monitoring use only. Typically, the

slaved VMON pins can be tied together with a resistor divider to

VOUT. However, if the MODE pin is tied to VCC for mode setting,

the related VMON2 pin is needed to tie to SGND with a 953Ω

resistor and 22nF capacitor, as shown in Figure 25 on page 17. If

there are multiple modules paralleled with the MODE pins tied to

VCC, each VMON2 pin of the slave module needs to have a 953Ω

resistor to GND while all VMON1 pins of the slave modules can be

tied together with a resistor divider from VOUT to GND, as shown

in Figure 26 on page 18. Also see Table 3 for VMON settings.

Because of the typical 5.4V VCC and 7.5kΩ resistor between

MODE pin and VMON2 pin, the 953Ω resistor maintains VMON2

pin voltage close to 0.6V, so output OVP/UVP (caused by VMON2

voltage too high or too low) will not be triggered falsely by part to

part tolerance at mass production. The 22nF capacitor is used to

avoid output UVP/OVP triggered during input start-up.

Overvoltage Protection (OVP)

The overvoltage (OV) protection indication circuitry monitors

voltage on the VMON pin. OV protection is active from the

beginning of soft-start. An OV condition (>120%) would latch the

IC off. In this condition, the high-side MOSFET (Q1 or Q3) latches

off permanently. The low-side MOSFET (Q2 or Q4) turns on

immediately at the time of OV trip and then turns off

permanently after the output voltage drops below 87%. EN and

PGOOD are also latched low in an OV event. The latch condition

can be reset only by recycling VCC.

There is another non-latch OV protection (113% of target level).

When EN is low and output is over 113% OV, the low-side

MOSFET turns on until output drops below 87%. This action

protects the power trains when even a single channel of a

multi-module system detects OV. The low-side MOSFET always

turns on when EN = LOW and the output voltage rises above

113% (all EN pins are tied together) and turns off after the output

drops below 87%. Thus, in a high phase count application

(multi-module mode), all cascaded modules can latch off

simultaneously via the EN pins (EN pins are tied together in

multi-phase mode). Each channel shares the same sink current

to reduce stress and eliminate bouncing among phases.

Over-Temperature Protection (OTP)

When the junction temperature of the internal controller is

greater than +150°C (typically), the EN pin is pulled low to inform

other cascaded channels via their EN pins. All connected ENs

stay low and then release after the module’s junction

temperature drops below +125°C (typically), a +25°C hysteresis

(typically).

Overcurrent Protection (OCP)

The OCP peak level is set to about 20A for each channel, but the OC

trip point can vary, due mainly to MOSFET rDS(ON) variations (over

process, current, and temperature). The OCP can be increased by

increasing the switching frequency since the inductor ripple is

reduced. However, the module efficiency drops accordingly with

more switching loss. When OCP is triggered, the controller pulls

EN low immediately to turn off all switches. The OCP function is

enabled at start-up and has a 7-cycle delay before it triggers.

In multi-module operation, ISHARE pins can be connected to

create VISHARE, which represents the average current of all

active channels. Total system currents are compared with a

precision threshold to determine the overcurrent condition. Each

channel also has an additional overcurrent set point with a

7-cycle delay. This scheme helps protect modules from damage

in multi-module mode by having each module carry less current

than the set point.

For overload and hard short conditions, overcurrent protection

reduces the regulator RMS output current to much less than full

load by putting the controller into hiccup mode. A delay equal to

three soft-start intervals is entered to allow time to clear the

disturbance. After the delay time, the controller initiates a

soft-start interval. If the output voltage comes up and returns to

regulation, PGOOD transitions high. If the OC trip is exceeded

during the soft-start interval, the controller pulls EN low again.

The PGOOD signal remains low, and the soft-start interval is

allowed to expire. Another soft-start interval is initiated after the

delay interval. If an overcurrent trip occurs again, this same cycle

repeats until the fault is removed. Since the output voltage may

trigger the OVP if the output current changes too fast, the module

can go into latch-off mode. In this case, the module needs to be

restarted.

Frequency Synchronization and Phase Lock

Loop

The SYNC pin has two primary capabilities: fixed frequency

operation and synchronized frequency operation. The ISL8225M

has an internally set fixed frequency of 500kHz. By tying a

resistor (RSYNC) to SGND from the SYNC pin, the switching

frequency can be set to be more than 500kHz. To increase the

switching frequency, select an externally connected resistor,

RSYNC, from SYNC to SGND according to the frequency setting

curve shown in Figure 33. See Table 1 for RSYNC at commonly

used frequency.

ISL8225MEVAL4Z Datasheet(PDF) 25 Page - Renesas Technology Corp

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