ISL8225MEVAL4Z datasheet(26/34 Pages) RENESAS

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ISL8225M

FN7822 Rev 2.00

Page 26 of 34

December 8, 2014

Connecting the SYNC pin to an external square-pulse waveform

(such as the CLKOUT signal, typically 50% duty cycle from

another ISL8225M) synchronizes the ISL8225M switching

frequency to the fundamental frequency of the input waveform.

The synchronized frequency can be from 300kHz to 1500kHz.

The applied square-pulse recommended high level voltage range

is 3V to VCC+0.3V. The frequency synchronization feature

synchronizes the leading edge of the CLKOUT signal with the

falling edge of Channel 1’s PWM signal. CLKOUT is not available

until PLL locks. No capacitor is recommended on the SYNC pin.

Locking time is typically 130µs. EN is not released for a soft-start

cycle until SYNC is stabilized and PLL is locking. Connecting all

EN pins together in a multi-phase configuration is recommended.

Loss of a synchronization signal for 13 clock cycles causes the

module to be disabled until PLL returns locking, at which point, a

soft-start cycle is initiated and normal operation resumes.

Holding SYNC low disables the module.

NOTE: That the quick change of the synchronization signal can cause

module shutdown.

Tracking Function

If CLKOUT is less than 800mV, an external soft-start ramp (0.6V)

can be in parallel with the Channel 2 internal soft-start ramp for

tracking applications. Therefore, the Channel 2’s output voltage

can track the output voltage of Channel 1.

The tracking function can be applied to a typical Double Data

Rate

(DDR) memory application, as shown in Figure 20 on

page 14. The output voltage (typical VTT output) of Channel 2

tracks with the input voltage [typical VDDQ/(1+k) from

Channel 1] at the CLKOUT pin. As for the external input signal

and the internal reference signal (ramp and 0.6V), the one with

the lowest voltage is used as the reference for comparing with

the FB signal. In DDR configuration, VTT channel should start up

later, after its internal soft-start ramp, such that VTT tracks the

voltage on the CLKOUT pin derived from VDDQ. This configuration

can be achieved by adding more filtering at EN/FF1 than at

EN/FF2.

It is suggested to scale the target CLKOUT voltage to 0.612V (2%

above 0.6V reference) with an external resistor divider. After

start-up, the internal reference takes over to maintain the good

regulation of VTT. The resistor divider ratio (k) of R7/R8 in

Figure 20 is Based on the feedback divider of VDDQ

(R1 and R2)together with the 0.612V target CLKOUT voltage as

shown in Equation 7:

For Figure 20, R1 = 1kΩ, R2 = 316Ω. The resistor divider ratio of

R7/R8 is calculated as 3.083, so R8 is 324Ω with 1kΩ used as

R7.

Mode Programming

ISL8225M can be programmed for dual-output, paralleled

single-output or mixed outputs (Channel 1 in parallel and

Channel 2 in dual-output). With multiple ISL8225Ms, up to 6

modules using its internal cascaded clock signal control, the

modules can supply large current up to 180A. For complete

operation, please refer to Table 3 on page 21. Commonly used

settings are listed in Table 5.

When the module is in the dual-output condition, depending

upon the voltage level at CLKOUT (which is set by the VCC resistor

divider output), ISL8225M operates with phase shifted as the

CLKOUT voltage shown in Table 6. The phase shift is latched as

VCC rises above POR; it cannot be changed on the fly.

FIGURE 33. RSYNC vs SWITCHING FREQUENCY

100

200

300

400

500

600

700

800

500 600 700 800 900 1000 1100 1200 1300 1400 1500

FREQUENCY (kHz)

TABLE 5. PHASE-SHIFT SETTING

OPERATION

PHASE-SHIFT

BETWEEN PHASES

VSEN2- VSEN2+ CLKOUT MODE

Dual Output

(Figure 18)

180°

N/C

VCC

N/C

30A

(Figure 19)

180°

VCC

N/C

SGND

30A

(Figure 23)

240°

VCC

SGND

N/C

VCC

60A

(Figure 24)

90°

VCC

N/C

VCC

90A

(Figure 26)

60°

VCC

N/C

SGND

TABLE 6. CLKOUT TO PROGRAM PHASE SHIFT AT DUAL-OUTPUT

CLKOUT

VOLTAGE SETTING

PHASE FOR CHANNEL 2

WRT CHANNEL 1

RECOMMENDED

CLKOUT VOLTAGE

<29% of VCC

-60°

15% VCC

29% to 45% of VCC

0°

37% VCC

45% to 62% of VCC

90°

53% VCC

62% of VCC

180°

VCC

--------



 1.02



–

(EQ. 7)

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