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MP6531A Datasheet(PDF) 9 Page - Monolithic Power Systems

Part # MP6531A
Description  5V - 60V, Three-Phase, Brushless, DC Motor Pre-Driver
PDF  18 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP6531A Datasheet(HTML) 9 Page - Monolithic Power Systems

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MP6531A – 5V - 60V, THREE-PHASE BLDC MOTOR PRE-DRIVER
MP6531A Rev. 1.02
www.MonolithicPower.com
9
6/20/2017
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2017 MPS. All Rights Reserved.
PIN FUNCTIONS
QFN
Pin #
TSSOP
Pin #
Name
Description
1
26
VIN
Input supply voltage. Bypass VIN to ground with a ceramic capacitor.
Additional bulk capacitance may be required. See the Applications Information
section for more detail.
2
27
CPA
Charge pump capacitor. Connect a ceramic capacitor between CPA and
CPB. See the Applications Information section for more detail.
3
28
CPB
4
1
VREG
Gate drive supply output. Connect a ceramic capacitor between VREG and
ground. See the Applications Information section for more detail.
5
2
BSTA
Bootstrap phase A. Connect a ceramic capacitor to SHA. See the
Applications Information section for more detail.
6
3
SHA
High-side source connection phase A.
7
4
GHA
High-side gate drive phase A.
8
5
GLA
Low-side gate drive phase A.
9
6
BSTB
Bootstrap phase B. Connect a ceramic capacitor to SHB. See the
Applications Information section for more detail.
10
7
SHB
High-side source connection phase B.
11
8
GHB
High-side gate drive phase B.
12
9
GLB
Low-side gate drive phase B.
13
10
BSTC
Bootstrap phase C. Connect a ceramic capacitor to SHC. See the
Applications Information section for more detail.
14
11
SHC
High-side source connection phase C.
15
12
GHC
High-side gate drive phase C.
16
13
GLC
Low-side gate drive phase C.
17
14
LSS
Low-side source connection.
18
15
HC
Phase C high-side input.
19
16
HB
Phase B high-side input.
20
17
HA
Phase A high-side input.
21
18
LC
Phase C low-side input.
22
19
LB
Phase B low-side input.
23
20
LA
Phase A low-side input.
24
21
nFAULT
Fault indication. nFAULT is an open-drain output. nFAULT is logic low when
in a fault condition.
25
22
nSLEEP
Sleep mode input. Drive nSLEEP logic low to enter low-power sleep mode;
drive nSLEEP logic high to enable the device. nSLEEP has an internal pull-
down resistor.
26
23
OCREF
Over-current protection reference voltage input.
27
24
DT
Dead time setting. Connect a resistor between DT and ground to set the
dead time. See the Applications Information section for more detail.
28
25
GND
Ground.



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