 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AD9022 Datasheet(PDF) 10 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
AD9022 Datasheet(HTML) 10 Page - Analog Devices |
|
|
10 / 12 page  –10– AD9022 REV. B Analog Input Analog input signals can be directly fed into the device under test input (AIN). The AIN input is terminated at the device with a 62 Ω resistor to give a parallel equivalent of 51 Ω (62 Ω 300 Ω). DAC Reconstruction The AD9022 evaluation board provides an onboard AD9713B reconstruction DAC for observing the digitized analog input signal. The AD9713B is terminated into 51 Ω to provide a 1 V p-p signal at the output (RC Output). Output Data The output data bits are latched with two 74LS574 latches which drive a 40-pin connector (AMP p/n 102153-09). The data and clock signals are available at the connector per the pin assignments shown on the schematic of the evaluation board. Data is latched on the rising edge of the encode clock. 8 12 1D 2D 3D 4D 5D 6D 7D 8D 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CK OE U4 74LS574 2 3 4 5 6 7 8 9 25 24 23 22 21 20 19 18 17 D9 D10 D11 D12 LSB ENCODE AIN D8 D7 D6 D5 D4 D3 D2 MSB D1 COMP U1 AD9022Q –5.2V C4 0.1 F 11 1 19 18 17 16 15 14 13 12 2 3 4 5 6 7 8 9 10 11 14 28 R12 R14 R15 R16 R17 R18 R19 R20 D12 (LSB) D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 (MSB) LE 26 R8 R9 R10 R11 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 20 19 –5.2V R4 7.5k C5 0.1 F R5 51 RC OUT U2 AD9698R 14 13 16 3 4 U2 AD9698R 11 12 9 6 5 R1 51 +5V 1 2 CR1 AD589H C1 0.1 F BNC J1 CLOCK R7 62 AIN E2 E1 BNC J2 U5 AD9713P R6 51 BNC J4 CLK R2 5.1k R21 100 U6 74AS32 8 9 10 RSET REFOUT CIN COUT REFIN IOUT 24 18 R3 20 17 16 14 IOUT 1D 2D 3D 4D 5D 6D 7D 8D 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CK OE U3 74LS574 2 3 4 5 6 7 8 9 11 1 19 18 17 16 15 14 13 12 C13 0.1 F C2 10 F 20% 35V C6 0.1 F C7 0.1 F C8 0.1 F C9 0.1 F C10 0.1 F C11 0.1 F C12 0.1 F +5V C22 0.1 F U6 74AS32 3 1 2 U6 74AS32 6 4 5 U6 74AS32 11 13 12 CLK D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 H40DMC J3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 J5 –5.2V J6 +5V J7 GND C3 10 F 20% 35V C14 0.1 F C15 0.1 F C16 0.1 F C17 0.1 F C18 0.1 F C19 0.1 F C20 0.1 F C21 0.1 F –5.2V Figure 12. AD9022/PCB Evaluation Board Schematic |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
