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ISL5586FCM Datasheet(PDF) 13 Page - Renesas Technology Corp |
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ISL5586FCM Datasheet(HTML) 13 Page - Renesas Technology Corp |
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13 / 20 page ![]() ISL5586 FN4924 Rev 2.00 Page 13 of 20 Nov 3, 2004 Power Denial Overview The power denial mode (111) will shutdown the entire device except for the logic interface. Loop supervision is not provided. This mode may be used as a sleep mode or to shut down the SLIC in the presence of fault conditions. Switching between high and low battery will have no effect during power denial. Functionality During power denial, both the Tip and Ring amplifiers are disabled, presenting high impedances to the line. The voltages at both outputs are near ground. Thermal Shutdown In the event the safe die temperature is exceeded due to a fault condition the device will automatically shut down. The thermal shutdown threshold is approximately 170 ºC.When the device cools to a temperature below the thermal threshold it will power back up automatically. If the fault persists the part will continue to go in and out of thermal shutdown which can be observed as an oscillation on Tip or Ring. Programming power denial will shut down the device and stop the self cooling cycle. Battery Switching Overview The integrated battery switch selects between high battery and low battery operation. The battery switch is controlled with the logic input BSEL. When BSEL is a logic high, the high battery (VBH) is selected. A logic low will enable the low battery (VBL). All operating modes of the SLIC will function from high or low battery, but it is strongly recommended Forward Loop Back be enabled only with the low battery. Functionality The logic control is independent of the operating mode decode. Independent logic control provides the most flexibility and will support all application configurations. When changing device operating states, battery switching should occur simultaneously with or prior to changing the operating mode. In most cases, this will minimize overall power dissipation and prevent glitches on the DET output. The only external component required to support the battery switch is a diode in series with the VBH supply lead. In the event that high battery is removed, the diode allows the device to transition to low battery operation. Low Battery Operation All off hook operating conditions should use the low battery to minimize power dissipation. A typical low battery operating voltage for the SLIC is -24V, however this may be increased to support longer loop lengths or high loop current requirements. Standby conditions may also operate from the low battery if MTU compliance is not required, further reducing standby power dissipation. High Battery Operation Other than ringing, the high battery should be used for standby conditions which must provide MTU compliance. During standby operation the power consumption is typically 85mW with -100V battery. If ringing requirements do not require full 100V operation, then a lower battery will result in lower standby power. High Voltage Decoupling The 100V rating of the SLIC dictates a capacitor of higher voltage rating be used for decoupling. Suggested decoupling values for all device pins are 0.1 F. If the protection scheme shown in Figure 15 is implemented the VBH decoupling capacitor should be increased to 0.47uF. This is done to minimize the turn-on time of the battrax device during negative surge transients. Standard surface mount ceramic capacitors are rated at 100V. For applications driven by low cost and small size, the decoupling scheme shown in Figure 10 could be implemented. It is important to place an external diode between the VBH pin and the decoupling capacitor. Connecting the decoupling capacitor directly to the VBH pin will degrade the reliability of the device. Refer to Figure 15 for the proper arrangement. This applies to both single and stacked and decoupling schemes. If VBL and VBH are tied together the battery switch function is overridden. In this case the external diode is not needed and the decoupling capacitor may be attached directly to VBH pin. VBH VBL 0.22 0.22 ISL5586 FIGURE 10. ALTERNATE DECOUPLING SCHEME FIGURE 11. IMPEDANCE SYNTHESIS TIP RING + - -IN VFB VZO RF R R + - +- 1:1 20 20 3R 4R 4R 4R 4R 3R 8K RS CFB TA VSA IL VTR + - V2W |
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