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ISL5586FCM Datasheet(PDF) 2 Page - Renesas Technology Corp

Part # ISL5586FCM
Description  Low Power Ringing SLIC for Home Gateways
PDF  20 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ISL5586FCM Datasheet(HTML) 2 Page - Renesas Technology Corp

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ISL5586
FN4924 Rev 2.00
Page 2 of 20
Nov 3, 2004
Pinout
ISL5586 (PLCC)
TOP VIEW
Ordering Information
PART NUMBER
HIGH BATTERY (VBH)
LONGITUDINAL
BALANCE
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
100V
85V
75V
58dB
53dB
ISL5586FCM

0 to 75
28 Ld PLCC
N28.45
ISL5586FCMZ (Note)

0 to 75
28 Ld PLCC (Pb-free)
N28.45
ISL5586FCMZ-T (Note)

0 to 75
28 Ld PLCC Tape and Reel (Pb-free)
N28.45
ISL5586BIM

-40 to 85
28 Ld PLCC
N28.45
ISL5586BIMZ (Note)

-40 to 85
28 Ld PLCC (Pb-free)
N28.45
ISL5586CIM

-40 to 85
28 Ld PLCC
N28.45
ISL5586CIMZ (Note)

-40 to 85
28 Ld PLCC (Pb-free)
N28.45
ISL5586DIM

-40 to 85
28 Ld PLCC
N28.45
ISL5586DIMZ (Note)

-40 to 85
28 Ld PLCC (Pb-free)
N28.45
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination
finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
Device Operating Modes
MODE
F2
F1
F0
DET
DESCRIPTION
Low Power Standby (LPS)
0
0
0
SHD
MTU compliant on hook operating mode.
Forward Active (FA)
0
0
1
SHD
MTU compliant and OHT capable on hook mode, off hook loop feed mode.
Unused
0
1
0
n/a
Reserved for internal purposes.
Reverse Active (RA)
0
1
1
SHD
Signalling mode which reverses direction of loop current, otherwise like Forward Active.
Ringing
1
0
0
RTD
Signalling mode used to generate high voltage balanced ringing signal.
Forward Loop Back (FLB)
1
0
1
SHD
Internal loop back mode which connects internal load across Tip and Ring terminals.
Tip Open/Ground Start (TO) 1
1
0
SHD
Signalling mode sets Tip to high impedance state, Ring output still active.
Power Denial (PD)
1
1
1
n/a
Loop disconnect mode which forces both Tip and Ring to high impedance.
RTD
CDCM
-IN
VCC
TL
CDCP
VFB
F2
VRSM
BSEL
F1
F0
DET
VRSP
5
6
7
8
9
10
11
12
13
14 15
16
17
18
1
2
3
4
19
20
21
22
23
24
25
26
27
28



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