ZL2008

FN6859 Rev 4.00

Page 39 of 43

April 29, 2011

Revision History

Rev. #

Description

Date

1.0

Initial release

January 2009

FN6859.0 Assigned file number FN6859 to datasheet as this will be the first release with an Intersil file number. Replaced header

and footer with Intersil header and footer. Updated disclaimer information to read “Intersil and it’s subsidiaries including

Zilker Labs, Inc.” No changes to datasheet content

February 2009

FN6859.1 Updated to new format. Updates include:

a) Putting Abs Max, Recommended Operating Conditions and Electrical Specs tables into

Intersil format

- Adding Pb-free reflow link to Thermal info

- Adding Intersil's caution statement, per legal

b) Put Ordering Info table into Intersil format

- Adding Moisture Sensitivity Level note, TB347 tape and reel spec note and Pb-free note

(corresponding to

lead finish).

c) Updated sales disclaimer on last page to Intersil's verbiage

d) Replaced Zilker POD with Intersil equivalent POD (L36.6x6A)

e) Updated graphics to Intersil standards (font change)

f) Updated cross references to tables (since table #s were removed from Electrical Specs, Abs

Max, Recommended

Operating Conditions and Pin Descriptions tables)

g) Updated cross references to figures (since figure #s was removed from Pinout)

h) Added equation #s to all equations

i) Added Intersil standard over temp notes to Electrical Specs table as follows:

- Added Note 14: "Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless

otherwise specified.

Temperature limits established by characterization and are not

production

tested." to MIN MAX columns of Electrical

Specs table.

-Added "Boldface limits apply over the operating temperature range, -40°C to +85°C" to

common conditions of

Electrical Specs table. Bolded all MIN and MAX specs in table.

“Absolute Maximum Ratings” on page 4:

Removed “MOSFET Drive Reference for VR Pin……120mA”. Removed “2.5V Logic Reference for V25 Pin ……120mA”

“Electrical Specifications” table, page 4 to page 6:

Changed conditions for “Vr Reference Output Voltage” from <50mA to <20mA

Changed conditions for “V25 Reference Output Voltage” from <50mA to <20mA

Added the following sentence to Note 8: “Current Share member minimum delay is 5ms. Current share reference must

be 10ms greater than member delay”

Added Note 15: “Limits established by characterization and are not production tested.” Added Note 15 callout to the

following parameters:

Minimum Sync Pulse Width

High-side Driver Peak Gate Drive Current (Pull-down)

High-side Driver Pull-up Resistance

High-side Driver Pull-down Resistance

Low-side Driver Pull-up Resistance

Low-side Driver Pull-down Resistance

Switching timing (for both conditions)

VTRK Tracking Ramp Accuracy

UVLO Delay

October 2009