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ZL2008 Datasheet(PDF) 15 Page - Renesas Technology Corp |
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ZL2008 Datasheet(HTML) 15 Page - Renesas Technology Corp |
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15 / 43 page ![]() ZL2008 FN6859 Rev 4.00 Page 15 of 43 April 29, 2011 DOSA VOLTAGE TRIM MODE On a DOSA module, the VOUT setting follows Equation 3: To maintain DOSA compatibility, the same scheme is used as with a POLA module except the 10k resistor is replaced with a 8.66k resistor as shown in Figure 12. The DOSA mode VOUT settings are listed in Table 5. Start-up Procedure The ZL2008 follows a specific internal start-up procedure after power is applied to the VDD pin. Table 6 describes the start-up sequence. If the device is to be synchronized to an external clock source, the clock frequency must be stable prior to asserting the EN pin. The device requires approximately 5ms to 10ms to check for specific values stored in its internal memory. If the user has stored values in memory, those values will be loaded. The device will then check the status of all multi-mode pins and load the values associated with the pin settings. Once this process is completed, the device is ready to accept commands via the I2C/SMBus interface and the device is ready to be enabled. Once enabled, the device requires approximately 2ms before its output voltage may be allowed to start its ramp- up process. If a soft-start delay period less than 2ms has been configured (using PMBus commands), the device will default to a 2ms delay period. If a delay period greater than 2ms is configured, the device will wait for the configured delay period prior to starting to ramp its output. After the delay period has expired, the output will begin to ramp towards its target voltage according to the pre-configured soft-start ramp time that has been set using the SS pin. It should be noted that if the EN pin is tied to VDD, the device will still require approx 5ms to 10ms before the output can begin its ramp-up as described in Table 6. Soft-start Delay and Ramp Times It may be necessary to set a delay from when an enable signal is received until the output voltage starts to ramp to its target value. In addition, the designer may wish to precisely set the time required for VOUT to ramp to its target value after the delay period has expired. These features may be used as part of an overall inrush current management strategy or to precisely control how fast a load IC is turned on. The ZL2008 gives the system designer several options for precisely and independently controlling both the delay and ramp time periods. The soft-start delay period begins when the EN pin is asserted and ends when the delay time expires. The soft-start delay period is set using the SS pin. Precise ramp delay timing reduces the delay time variations but is only available when the appropriate bit in the MISC_CONFIG register has been set. Please refer to Application Note AN2033 for details. The soft-start ramp timer enables a precisely controlled ramp to the nominal VOUT value that begins once the delay period has expired. The ramp-up is guaranteed monotonic and its slope may be precisely set using the SS pin. The soft-start delay and ramp times can be set to standard values according to Table 7. TABLE 5. DOSA Mode VOUT Settings VOUT (V) RSET (k) In series with 8.660k resistor 0.700 162 0.752 113 0.758 100 0.765 90.9 0.772 82.5 0.790 75.0 0.800 57.6 0.821 52.3 0.834 47.5 0.848 43.2 0.880 36.5 0.899 33.2 0.919 30.1 0.965 25.5 0.991 22.6 1.000 21.0 1.100 17.8 1.158 14.7 1.200 13.3 1.250 10.5 1.500 8.87 1.669 6.98 1.800 6.04 2.295 4.32 2.506 3.74 3.300 2.61 5.000 1.50 NOTE: (R0 = 110k , R1 = RSET + 8.66k) V V R OUT SET 69 . 0 6900 (EQ. 3) ZL 8.66 kΩ DOSA MODULE Rset V1 V0 110 kΩ FIGURE 12. RSET on a DOSA Module |
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